Modeling Heating Effects in Low-Power Multi-Gate SOI Devices and High-Power GaN HEMTs

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Project SummarySince scaling of conventional semiconductor devices will ultimately reach its limits due to both high production cost and device reliability issues, alternatives to classical metal-oxide-semiconductor field effect transistors (MOSFETs) are being sought. There are two ways one can achieve enhanced device performance: (1) by using alternative materials such as strained-Si, SiGe, GaN, etc.; and (2) by using alternative device geometries.Fully-depleted silicon on insulator (SOI), dual gate and FinFET devices are examples of al-ternative device technologies. Since the active silicon film in these structures is placed on top of a buried insulator layer, the power dissipation due to the substrate leakage current is eliminated. However, the buried oxide layer (which has a thermal conductivity about 100 times smaller than bulk Si) is a tremendous barrier to heat conduction, and degradation of the carrier mobility in the channel region of these devices occurs due to self-heating effects. In addition to silicon on insula-tor low power devices, heating is also a problem in high power wide-bandgap GaN HEMTs due to the large operation biases. The understanding of self-heating in these device structures can also shed light on their reliability, namely the phenomenon of current collapse due to the formation of cracks at the gate-drain end of the channel due to large electric fields and high lattice tempera-tures.Therefore, the purpose of this project is to develop sophisticated particle-based device simu-lation tools that simultaneously take into account self-heating effects by solving the Boltzmann transport equations (BTEs) for both electrons and phonons, and considering quantum confine-ment effects for both the electrons and the phonons. Such a tool would be the most sophisticated simulator to date since electron and phonon transport is treated at the same physical level within the BTE.The impact of this project is two-fold. (1) For low-power devices it allows for better device de-signs including the utilization of alternative buried insulator materials that may lead to better de-vice performance. This in turn can lead to new generations of CMOS devices. (2) Regarding the GaN HEMTs, if the problem of current collapse is understood and prevented, then these devices will have applications in the military and the automotive industry where both high-power, high temperature and high-frequency devices are being sought. Yet another important component of this project is that the students involved in the project will work on the state of the art research