CSR: Medium: Collaborative Research: Providing Predictable Timing for Task Migration in Embedded Multi-Core Environments (TiME-ME)
CSR:中:协作研究:为嵌入式多核环境中的任务迁移提供可预测的时序 (TiME-ME)
基本信息
- 批准号:0905212
- 负责人:
- 金额:$ 30.5万
- 依托单位:
- 依托单位国家:美国
- 项目类别:Continuing Grant
- 财政年份:2009
- 资助国家:美国
- 起止时间:2009-09-01 至 2015-08-31
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
Assuring deadlines of embedded tasks for contemporary multicore architectures is becoming increasingly difficult. Real-time scheduling relies on task migration to exploit multicores, yet migration actually reduces timing predictability due to cache warm-up overheads and increased interconnect traffic.This work promotes a fundamentally new approach to increase the timing predictability of multicore architectures aimed at task migration in embedded environments making three major contributions:1. The development of novel strategies to guide migration based on cost/benefit tradeoffs exploiting both static and dynamic analyses.2. The devising of mechanisms to increase timing predictability under task migration providing explicit support for proactive and reactive real-time data movement across cores and their caches.3. The promotion of rate- and bandwidth-adaptive mechanisms as well as monitoring capabilities to increase predictability under task migration.The work aims at initiating a novel research direction investigating the benefits of interactions between hardware and software for embedded multicores with respect to timing predictability. This project fundamentally contributes to the research and educational infrastructure for the design and development of safety- and mission-critical embedded systems.
保证当代多核架构的嵌入式任务的最后期限变得越来越困难。实时调度依赖于任务迁移,以利用多核,但迁移实际上降低了时间的可预测性,由于缓存预热开销和增加互连traffic.This工作促进了一个从根本上新的方法来增加时间的可预测性的多核架构,旨在任务迁移在嵌入式环境中作出三个主要贡献:1。开发新的战略,以指导迁移的基础上,利用静态和动态分析的成本/效益权衡。设计机制以增加任务迁移下的时间可预测性,为跨核及其缓存的主动和被动实时数据移动提供明确的支持。促进速率和带宽的自适应机制,以及监测能力,以增加可预测性下task migration.The工作的目的是启动一个新的研究方向调查的好处,硬件和软件之间的相互作用,嵌入式多核定时可预测性。该项目从根本上有助于安全和关键任务嵌入式系统的设计和开发的研究和教育基础设施。
项目成果
期刊论文数量(0)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
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Spyros Tragoudas其他文献
LFSR Characteristic Polynomials for Pseudo-Exhaustive TPG with Low Number of Seeds
- DOI:
10.1023/a:1023740811613 - 发表时间:
2003-06-01 - 期刊:
- 影响因子:1.300
- 作者:
Dimitri Kagaris;Spyros Tragoudas - 通讯作者:
Spyros Tragoudas
Improved diagnosis using enhanced fault dominance
- DOI:
10.1016/j.vlsi.2011.01.002 - 发表时间:
2011-06-01 - 期刊:
- 影响因子:
- 作者:
Rajsekhar Adapa;Spyros Tragoudas;Maria K. Michael - 通讯作者:
Maria K. Michael
Using a WLFSR to Embed Test Pattern Pairs in Minimum Time
- DOI:
10.1023/a:1015087206329 - 发表时间:
2002-06-01 - 期刊:
- 影响因子:1.300
- 作者:
Dimitri Kagaris;Spyros Tragoudas - 通讯作者:
Spyros Tragoudas
Avoiding linear dependencies in LFSR test pattern generators
- DOI:
10.1007/bf00993089 - 发表时间:
1995-04-01 - 期刊:
- 影响因子:1.300
- 作者:
Dimitrios Kagaris;Spyros Tragoudas - 通讯作者:
Spyros Tragoudas
Spyros Tragoudas的其他文献
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{{ truncateString('Spyros Tragoudas', 18)}}的其他基金
IUCRC Phase I Southern Illinois University Carbondale: Center for Intelligent, Distributed, Embedded, Applications, and Systems (IDEAS)
IUCRC 第一阶段南伊利诺伊大学卡本代尔:智能、分布式、嵌入式、应用和系统中心 (IDEAS)
- 批准号:
2231623 - 财政年份:2023
- 资助金额:
$ 30.5万 - 项目类别:
Continuing Grant
Planning IUCRC Southern Illinois University Carbondale: Center for Networked Embedded, Smart and Trusted Things (NESTT)
规划 IUCCRC 南伊利诺伊大学卡本代尔:网络嵌入式、智能和可信事物中心 (NESTT)
- 批准号:
1822155 - 财政年份:2018
- 资助金额:
$ 30.5万 - 项目类别:
Standard Grant
I/UCRC FRP: Collaborative Research: Scalable and Power-Efficient Compressive Sensing CMOS Image Sensors and Reconstruction Circuits
I/UCRC FRP:合作研究:可扩展且节能的压缩传感 CMOS 图像传感器和重建电路
- 批准号:
1535658 - 财政年份:2015
- 资助金额:
$ 30.5万 - 项目类别:
Standard Grant
I/UCRC: Consortium for Embedded Systems - Phase II
I/UCRC:嵌入式系统联盟 - 第二阶段
- 批准号:
1361847 - 财政年份:2014
- 资助金额:
$ 30.5万 - 项目类别:
Continuing Grant
I/UCRC FRP: Collaborative Research: Testability and timing analysis in nanoscale designs in the presence of process variations
I/UCRC FRP:协作研究:存在工艺变化的纳米级设计中的可测试性和时序分析
- 批准号:
1432026 - 财政年份:2014
- 资助金额:
$ 30.5万 - 项目类别:
Standard Grant
I/UCRC: Collaborative Research: Synthesis and Design of Robust Threshold Logic Circuits
I/UCRC:合作研究:鲁棒阈值逻辑电路的综合与设计
- 批准号:
1230757 - 财政年份:2012
- 资助金额:
$ 30.5万 - 项目类别:
Standard Grant
Collaborative Research: Consortium for Embedded Systems
合作研究:嵌入式系统联盟
- 批准号:
0856039 - 财政年份:2009
- 资助金额:
$ 30.5万 - 项目类别:
Continuing Grant
Collaborative Research: Synthesis, Verification and Testing for Nano-CMOS and Beyond using Threshold Logic
合作研究:使用阈值逻辑对 Nano-CMOS 及其他技术进行综合、验证和测试
- 批准号:
0702628 - 财政年份:2007
- 资助金额:
$ 30.5万 - 项目类别:
Standard Grant
Collaborative Research: Consortium for Embedded Systems
合作研究:嵌入式系统联盟
- 批准号:
0700757 - 财政年份:2007
- 资助金额:
$ 30.5万 - 项目类别:
Standard Grant
Built-In Test Mechanisms and Embedded Cores
内置测试机制和嵌入式内核
- 批准号:
0096119 - 财政年份:1999
- 资助金额:
$ 30.5万 - 项目类别:
Continuing Grant
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