CSR: Medium: Collaborative Research: Static Pipelining, an Approach for Ultra-Low Power Embedded Processors

CSR：中：协作研究：静态流水线，一种超低功耗嵌入式处理器的方法

• 批准号: 0964413
• 负责人: David Whalley
• 金额: $ 61.36万
• 依托单位: Florida State University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2010
• 资助国家: 美国
• 起止时间: 2010-05-01 至 2015-04-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0964413&HistoricalAwards=false
• 关键词: CSR; Medium; Collaborative; Research; Static

As mobile embedded systems become more prevalent, there is an increasing demand to make processor pipelines more power efficient. Conventional pipeline inefficiencies include unnecessary accesses to the register file due to duplication or avoidable computation from constantly checking for forwarding and hazards at points where they cannot possibly occur, repeated calculation of invariant values, etc. It is desirable to develop an alternative processor design that can avoid these wasteful energy consumption aspects of a traditionally pipelined processor while still achieving comparable performance.A statically pipelined processor is expected to achieve these goals by having the control during each cycle for each portion of the processor explicitly represented in each instruction. The pipelining is in effect statically determined by the compiler, which has several potential benefits, such as reducing energy consumption without degrading performance, supporting a less complex design with a lower production cost, and being able to apply more effective compiler optimizations due to instructions having more explicit control of the processor.If successful, the broader impact of this research is manifold. The use of ultra-low power embedded devices, such as bio-implantable microelectronic devices, can significantly affect everyday activities. A new generation of ultra-low power processors will enable these devices to be more feasible to develop and deploy. Educational efforts to introduce the latest architecture and compiler enhancements in the classroom complement our research. Steps will also be taken to increase female and minority enrollment at both institutions in their Computer Science and Computer Engineering programs.

随着移动的嵌入式系统变得更加流行，对使处理器流水线更加功率高效的需求不断增加。 传统的流水线低效率包括由于重复或可避免的计算而对寄存器堆的不必要的访问，所述计算来自在不可能发生转发和冒险的点处不断地检查转发和冒险，不变值的重复计算，期望开发一种替代的处理器设计，其可以避免传统流水线处理器的这些浪费的能量消耗方面，同时仍然实现相当的性能。静态流水线处理器被期望通过在每个周期期间对在每个指令中明确表示的处理器的每个部分进行控制来实现这些目标。 流水线实际上是由编译器静态确定的，这有几个潜在的好处，例如在不降低性能的情况下降低能耗，支持具有较低生产成本的较不复杂的设计，以及由于指令具有对处理器的更明确的控制而能够应用更有效的编译器优化。使用超低功耗嵌入式设备，如生物植入式微电子设备，可以显着影响日常活动。 新一代超低功耗处理器将使这些设备的开发和部署更加可行。 在课堂上介绍最新架构和编译器增强功能的教育工作补充了我们的研究。 还将采取措施，提高这两所大学计算机科学和计算机工程专业的女性和少数民族入学率。