FoMR: Collaborative Research: Dependent ILP: Dynamic Hoisting and Eager Scheduling of Dependent Instructions

计算中的指令级并行（ILP）允许应用程序中的不同机器级指令在微处理器中并行执行。利用ILP在计算中提供了显著的性能优势，但近年来ILP的改进很少。该项目提出了一种称为“急切执行”的新方法，可以显着提高ILP。许多应用程序的成功取决于它们的执行效率。所提出的即时执行技术将使运行在移动设备上的应用程序和运行在数量不断增长的数据中心上的大型数据应用程序受益。在所有尺度上实现更好的系统将进一步使无处不在的计算继续渗透到生活中。该项目的方法包括以下优点：(1)直接依赖于用户的指令可以更快地交付给功能单元执行；(2)可以检测到自上次执行以来源寄存器值未发生变化的指令的执行情况，避免冗余计算；(3)生产者/消费者指令对之间的依赖关系有时可以被分解，以便它们可以同时被调度执行；(4)来自多个路径的消费者指令可以推测性地执行，其结果可以自然地保留在范式中，以避免在分支预测错误后重新执行；(5)可以提前执行关键指令以提高性能，包括加载预取缓存线和预计算分支结果以避免分支错误预测延迟。该奖项反映了美国国家科学基金会的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

Instruction-level parallelism (ILP) in computing allows different machine-level instructions within an application to execute in parallel within a micro-processor. Exploitation of ILP has provided significant performance benefits in computing, but there has been little improvement in ILP in recent years. This project proposes a new approach called "eager execution" that could significantly increase ILP. The success of many applications depends on how efficiently they can be executed. The proposed eager execution technique will benefit applications that span those running on mobile devices to large data applications running on the ever-growing number of data centers. Enabling better systems at all scales will further enable the ubiquitous computing that continues to pervade lives.The project's approach includes the following advantages: (1) immediately-dependent consumer instructions can be more quickly delivered to functional units for execution; (2) the execution of instructions whose source register values have not changed since its last execution can be detected and redundant computation can be avoided; (3) the dependency between a producer/consumer pair of instructions can sometimes be collapsed so they can be simultaneously dispatched for execution; (4) consumer instructions from multiple paths may be speculatively executed and their results can be naturally retained in the paradigm to avoid re-execution after a branch misprediction; and (5) critical instructions can be eagerly executed to improve performance, which include loads to prefetch cache lines and pre-computation of branch results to avoid branch misprediction delays.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.