NeTS: Medium: Collaborative Research: Experimental Platform for Low-Power Wireless Networking Research

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The conventional architecture for short-range, low-power, wireless hardware integrates a radio transceiver and a general-purpose microcontroller. However, microcontrollers have limited computational power and hence, restrict the kinds of algorithms that can be implemented. Moreover, closed radio architectures prevent the direct access to the physical layer needed for many novel applications. The emergence of low-power FPGAs with their efficient duty cycling support presents an opportunity to create a novel wireless platform to overcome these limitations. The project develops a highly flexible hardware/software architecture for mobile wireless networking based on low-power FPGA devices. High performance DSP and other algorithms can be implemented directly in hardware, while the rest of the code runs on a soft processor core inside the FPGA. This flexible hardware/software boundary increases the complexity of software development that is eased via sophisticated development tool support and an extensive software component library that the project is also developing. The small inexpensive platform offers two orders of magnitude higher performance than current microcontroller-based hardware at equivalent power for many applications. Hence, it will stimulate research in novel protocols and enable new applications not possible today. A competition for undergraduate students will be organized in which winners will receive the hardware, software, training, and mentorship needed to carry out their ideas during a paid summer internship at Vanderbilt.