CIF: Small: Digital Background Calibration of Digital-to-Analog Converters in CMOS Technologies

CIF：小型：CMOS 技术中数模转换器的数字背景校准

• 批准号: 1016704
• 负责人: Stephen Lewis
• 金额: $ 47.21万
• 依托单位: University of California-Davis
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2010
• 资助国家: 美国
• 起止时间: 2010-09-01 至 2014-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1016704&HistoricalAwards=false
• 关键词: CIF; Small; Digital; Background; Calibration

Communications systems often transfer digital data because digital systems are reliable, programmable, and testable. The digital data are converted to analog form by a digital-to-analog converter (DAC), which produces the input to a channel that makes a physical connection between the transmitter and receiver. Channel nonidealities cause the raw received signals to be continuously variable (analog). In practice, each location has a transmitter and a receiver operating together. Therefore, the raw received signal at any location consists of an analog signal related to the remote digital data plus a filtered copy of the local transmitter signal (an "echo"). An analog-to-digital converter (ADC) converts this combined signal into digital form. An echo canceler adaptively removes the echo but usually cannot remove noise or distortion. Therefore, ADCs and DACs used in digital communication systems must have high resolution (for low noise) and high linearity (for low distortion). Inside the ADCs and DACs, unintentional mismatch between elements causes distortion, which is commonly reduced by calibration. However, calibration is often done in the foreground, which means that it interrupts the conversion and reduces the communications rate. To overcome this problem, background calibration can be used. Background calibration operates during normal conversion and has been much less thoroughly studied in DACs than in ADCs. This project involves investigating the digital background calibration of high-speed, high-linearity DACs used for data-communication systems. Unlike in previously reported work, the calibration architecture considered here senses and corrects for signal-dependent output resistance effects. Also, it can improve not only the static (or low output frequency) DAC performance, but also the dynamic (or high output frequency) performance, which is the main limitation in state-of-the art DACs.

通信系统通常传输数字数据，因为数字系统是可靠的、可编程的和可测试的。数字数据通过数模转换器（DAC）转换为模拟形式，该转换器产生通道的输入，该通道在发射器和接收器之间建立物理连接。信道非理想性导致原始接收信号是连续可变的（模拟）。实际上，每个位置都有一个发射器和一个接收器一起工作。因此，在任何位置的原始接收信号由与远程数字数据相关的模拟信号加上本地发射机信号的滤波副本（“回波”）组成。模数转换器（ADC）将这个组合信号转换成数字形式。回声消除器自适应地消除回声，但通常不能消除噪声或失真。因此，数字通信系统中使用的adc和dac必须具有高分辨率（低噪声）和高线性度（低失真）。在adc和dac内部，元件之间的无意失配会导致失真，这通常通过校准来减少。然而，校准通常是在前景中完成的，这意味着它会中断转换并降低通信速率。为了克服这个问题，可以使用背景校准。背景校准在正常转换期间操作，并且在dac中比adc中研究得更不彻底。该项目涉及研究用于数据通信系统的高速、高线性dac的数字背景校准。与之前报道的工作不同，这里考虑的校准架构检测和校正信号相关的输出电阻效应。此外，它不仅可以提高静态（或低输出频率）DAC性能，还可以提高动态（或高输出频率）性能，这是最先进的DAC的主要限制。