CIF: Small: Digital Background Calibration of Digital-to-Analog Converters in CMOS Technologies

通信系统经常传输数字数据，因为数字系统是可靠的、可编程的和可测试的。数字数据由数模转换器（DAC）转换为模拟形式，DAC产生到通道的输入，该通道在发射器和接收器之间建立物理连接。信道非理想性导致原始接收信号连续可变（模拟）。 实际上，每个位置都有一个发射机和一个接收机一起工作。因此，在任何位置处的原始接收信号由与远程数字数据相关的模拟信号加上本地发射机信号的滤波副本（“回波”）组成。模数转换器（ADC）将该组合信号转换为数字形式。 回声消除器自适应地消除回声，但通常不能消除噪声或失真。因此，数字通信系统中使用的ADC和DAC必须具有高分辨率（低噪声）和高线性度（低失真）。 在ADC和DAC内部，元件之间的意外失配会导致失真，通常通过校准来降低失真。然而，校准通常在前台进行，这意味着它会中断转换并降低通信速率。为了克服这个问题，可以使用背景校准。背景校准在正常转换期间工作，在DAC中的研究远不如在ADC中深入。本项目涉及研究用于数据通信系统的高速、高线性DAC的数字背景校准。 与以前报道的工作不同，这里考虑的校准架构的传感器和信号相关的输出电阻效应进行校正。 此外，它不仅可以改善静态（或低输出频率）DAC性能，还可以改善动态（或高输出频率）性能，这是最先进DAC的主要限制。

Communications systems often transfer digital data because digital systems are reliable, programmable, and testable. The digital data are converted to analog form by a digital-to-analog converter (DAC), which produces the input to a channel that makes a physical connection between the transmitter and receiver. Channel nonidealities cause the raw received signals to be continuously variable (analog). In practice, each location has a transmitter and a receiver operating together. Therefore, the raw received signal at any location consists of an analog signal related to the remote digital data plus a filtered copy of the local transmitter signal (an "echo"). An analog-to-digital converter (ADC) converts this combined signal into digital form. An echo canceler adaptively removes the echo but usually cannot remove noise or distortion. Therefore, ADCs and DACs used in digital communication systems must have high resolution (for low noise) and high linearity (for low distortion). Inside the ADCs and DACs, unintentional mismatch between elements causes distortion, which is commonly reduced by calibration. However, calibration is often done in the foreground, which means that it interrupts the conversion and reduces the communications rate. To overcome this problem, background calibration can be used. Background calibration operates during normal conversion and has been much less thoroughly studied in DACs than in ADCs. This project involves investigating the digital background calibration of high-speed, high-linearity DACs used for data-communication systems. Unlike in previously reported work, the calibration architecture considered here senses and corrects for signal-dependent output resistance effects. Also, it can improve not only the static (or low output frequency) DAC performance, but also the dynamic (or high output frequency) performance, which is the main limitation in state-of-the art DACs.