RIA: High-Speed, High-Resolution, Analog-to-Digital Conversion in CMOS Technologies

传统的视频率应用要求分辨率不超过10位，而宽动态范围成像系统等新应用要求至少12位分辨率。对这类应用的要求超出了目前使用CMOS技术的最先进的模数转换器的能力。通过允许使用数字信号处理技术，这一领域的进展可以极大地降低这些应用的信号处理成本。这个项目的目标是：1.创造能够克服模数转换接口的实际线性限制的技术，而不需要转换率的相关损失并且不使用调整或校准，以及，2.通过制造原型来演示这些技术。1.的重点将放在用于高分辨率、视频速率应用的CMOS技术中的流水线模数转换接口。将研究能够克服实际线性限制的电路技术。由于这些技术可能会降低最大转换率，因此将探索并行性和数字信号处理技术的组合，这些技术有可能克服这种降低。

While traditional video-rate applications have required no more than 10-bit resolution, new applications such as wide-dynamic- range imaging systems require at least 12-bit resolution. The requirements for such applications exceed the capabilities of present, state-of-the-art analog-to-digital converters using CMOS technologies. Progress in this area could dramatically reduce the cost of signal processing for these applications by allowing the use of digital signal processing techniques. The objectives of this project are: 1. to create techniques that can overcome the practical linearity limitations of analog-to-digital conversion interfaces without an associated loss in conversion rate and without the use of trimming or calibration, and, 2. to demonstrate these techniques by fabricating prototypes. The focus of 1. will be on pipelined, analog-to-digital conversion interfaces in CMOS technologies for high-resolution, video-rate applications. Circuit techniques that can overcome the practical linearity limitations will be studied. Since these techniques may reduce the maximum conversion rate, combinations of parallelism and digital-signal-processing techniques that have the potential to overcome such a reduction will be explored.