SBIR Phase I: Compression-Based Analog-to-Digital Converters: Reaching New Low Power Limits in Quantization

SBIR 第一阶段：基于压缩的模数转换器：在量化方面达到新的低功耗限制

• 批准号: 1046544
• 负责人: Fred Tzeng
• 金额: $ 13.92万
• 依托单位: ZeroWatt Technologies, Inc.
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2011
• 资助国家: 美国
• 起止时间: 2011-01-01 至 2011-06-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1046544&HistoricalAwards=false
• 关键词: SBIR; Phase; Compression; Based; Analog

This Small Business Innovation Research Phase I project explores the chip implementation of adaptive and intelligent signal-compression-based analog-to-digital converters (ADC) to significantly lower the power consumption compared to traditional ADCs. In traditional analog-to-digital conversion, the signal is ?blindly? converted without any consideration to what the signal type or statistics are. As a result, the conversion process wastes a great deal of power. If the signal type or statistics are used wisely, the ADC power can be pushed to its lower limit. ADCs using a lossless signal compression data conversion technique are proposed, delivering up to an order of magnitude lower power than competing techniques. All these benefits come at no degradation of the effective number of bits (ENOB) and conversion rate compared to the traditional ADCs. Furthermore, the compression ADC needs no pre-knowledge of the signal type. Once signal input is plugged in, the ADC will automatically adapt to the power-optimized state of the input signal. This project?s objectives are to design, simulate and fabricate the compression-based ADC chip to validate its low power capabilities.The broader/commercial impacts of this project are major benefits in extended battery life, lower design costs, higher channel density, and simplified system design in many electronic systems. With compression-based ADCs that consume much less power, several critical objectives can be attained- 1) battery life of portable devices enhanced, 2) the number of channels in a multichannel systems can be increased, 3) system resolution or speed can be enhanced, and 4) device form factor can be reduced due to higher channel density per chip. With these benefits, end-users experience improved device portability, attain more accurate sense and detection, and overcome design challenges in severely power constrained systems. The technology would also enable new applications in low power electronics that were once deemed very challenging. With ADCs found in a high percentage of electronics, compression ADCs will be serving a growing $2.8 billion data converter market, playing multiple applications in medical, wireless, instrumentation, and military technologies.

该小型企业创新研究第一阶段项目探索了基于自适应和智能信号压缩的模数转换器（ADC）的芯片实现，与传统ADC相比，它可以显著降低功耗。在传统的模数转换中，信号是？盲目？转换时不考虑信号类型或统计信息。结果，转换过程浪费了大量的能量。如果明智地使用信号类型或统计数据，ADC功耗可以被推到其下限。提出了使用无损信号压缩数据转换技术的ADC，其功耗比竞争技术低一个数量级。与传统ADC相比，所有这些优点都不会降低有效位数（ENOB）和转换速率。此外，压缩ADC不需要预先知道信号类型。插入信号输入后，ADC将自动适应输入信号的功耗优化状态。这个项目？的目标是设计、仿真和制造基于压缩的ADC芯片，以验证其低功耗能力。该项目的广泛/商业影响是延长电池寿命、降低设计成本、提高通道密度和简化许多电子系统中的系统设计等方面的主要好处。使用功耗低得多的基于压缩的ADC，可以实现几个关键目标：1）增强便携式设备的电池寿命，2）可以增加多通道系统中的通道数量，3）可以提高系统分辨率或速度，以及4）由于每个芯片的通道密度更高，可以降低设备的外形尺寸。凭借这些优势，最终用户可以体验到更好的设备便携性，获得更准确的感知和检测，并克服严重功率受限系统中的设计挑战。该技术还将使曾经被认为非常具有挑战性的低功耗电子产品的新应用成为可能。随着ADC在电子产品中的比例越来越高，压缩ADC将服务于不断增长的28亿美元数据转换器市场，在医疗、无线、仪器仪表和军事技术中发挥多种应用。