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Project/Proposal Title: EAGER: Creating a New Paradigm for Computer Architecture and Implementation: The 10 X 10 Idea

Project/Proposal Title: EAGER: Creating a New Paradigm for Computer Architecture and Implementation: The 10 X 10 Idea
项目/提案标题:EAGER:创建计算机架构和实施的新范式:10 X 10 想法
批准号:
1057921
负责人:
Andrew Chien
金额:
$30.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2010
资助国家:
美国
项目状态:
已结题
起止时间:
2010-09-01 至 2012-04-30

项目摘要

项目成果

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中文摘要
翻译
微处理器在扩展性能方面面临着能量墙,这需要与过去25年的扩展技术(微架构创新和缓存)有很大的不同。在Exascale计算时间窗(2018+)中,即使具有并行性,先进的电路技术(如近阈值电压)和简化的微架构,能量也将是关键的限制因素,这意味着需要最有效地利用每个晶体管开关来完成应用工作的架构(和软件)。许多研究人员已经发表了利用异构或定制的技术,这些技术有可能降低能耗并提高性能,通常提高10倍或更多。然而,由于90/10优化模型的存在,这些技术中很少有能够大规模部署的,该模型对那些只对平均工作负载的一部分有益的创新进行了歧视。到目前为止,还没有一个系统的框架来考虑如何引入这种异构性,也没有一个规范的方法来分析和优化共享类似属性的工作负载。我们建议对10x10进行探索性开发,这是一个变革性模型,通过查看10个应用程序计算结构集群,为每个集群实现专门化,可以广泛利用定制来提高能效和性能。为了满足这些需求,我们将开发一个10x10模型,这是一个用于分析工作负载的规范框架,将它们划分到单独的集群中以进行能源和性能优化。有纪律地引入异构/定制?这带来了可以理解和可预见的好处。我们介绍了10x10架构的概念,它利用10x10框架在技术缩放机制中驱动节能和高性能微处理器的设计,该技术缩放机制产生大量晶体管,但适度的能量缩放。因为这些10x10架构可能比传统内核的常规复制更好地利用它们的晶体管来实现并行性,所以它们可以在低并行阶段(顺序)中表现得更好。此外,由于其更高的能源效率,它们也应该并行优于基于高并行性相复制传统核心的并行系统。简而言之,如果10x10研究取得成功,它将改变我们对应用程序工作负载分析、计算机体系结构和实现以及软件编译器工具的看法。如果成功,这些努力将改变计算机研究界和工业界的思想。潜在的是打破一个?局部最小值?被权力之墙和摩尔的终结所禁止?通过百亿亿次物理和数学过程的模拟,使科学突破成为可能。这项工作将与新计算机科学家的教育和经验联系在一起,因为它处理的是一种新颖的、可能具有变革性的架构思想。异构系统能源效率的改进将推广到新的NSF系统,如橡树岭的Track 2D实验系统。
英文摘要
Microprocessors are facing an energy wall in scaling performance which requires a major deviation from the scaling technologies of the past 25 years (microarchitecture innovation and caches). In the Exascale computing time window (2018+), even with parallelism, advanced circuit techniques such as near-threshold voltage, and simplified microarchitectures, energy will be the key constraint, implying that architectures (and software) which make most efficient use of each transistor switching to complete application work are needed. Many researchers have published techniques which exploit heterogeneity or customization which have the potential to reduce energy and increase performance, often by 10x or more. However, few of these techniques have made it into large-scale deployment because of the 90/10 optimization model, which discriminates against innovations which benefit only a portion of the average workload. To date there has been no systematic framework for thinking about how to introduce such heterogeneity and no disciplined method for analyzing and optimizing for workloads which shared like properties. We propose exploratory development of 10x10, a transformative model which enables both broad exploitation of customization for higher energy efficiency and performance, by looking at 10 clusters of application computational structure, enabling specialization for each.To meet these needs, we will develop a 10x10 model, a disciplined framework for analyzing workloads, dividing them in separate clusters for energy and performance optimization ? and disciplined introduction of heterogeneity/customization ? which yields understandable and predictable benefits. We introduce the notion of 10x10 architecture, which exploits the 10x10 framework to drive the design of energy efficient and higher performance microprocessors in a technology scaling regime which yields plentiful transistors, but modest energy scaling.Because these 10x10 architectures may make better use of their transistors than regular replication of traditional cores for parallelism, they can be expected to outperform them in low parallelism phases (?sequential?). In addition, because of their greater energy efficiency, they should also parallel outperform parallel systems based on the replication of traditional cores in phases with high parallelism. In short, if 10x10 research is successful, it will transform how we think about application workload analysis, computer architecture and implementation, and software compiler tools. If successful, these efforts will transform the thinking of the computing research community and the industry. The potential is to break out of a ?local minima? proscribed by the power wall and the end of Moore?s Law to enable scientific breakthroughs facilitated by exascale simulation of physical and mathematical processes. This work will tie into the education and experience of new computer scientists, dealing as it does with a novel and potentially transformative architecture idea. Improvements in energy efficiency on heterogeneous systems will be disseminated to new NSF systems such as the Track 2D experimental system at Oak Ridge.
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EAGER: Extending the Productive Lifetime of Scientific Computing Equipment
  • 批准号:
    2019506
  • 项目类别:
    Standard Grant
  • 资助金额:
    $30.0万
  • 财政年份:
    2020
  • 负责人:
    Andrew Chien
  • 依托单位:
SHF: Small: Collaborative Research: Accelerated Data Transformation: A Software-Hardware Stack for Transducers
  • 批准号:
    1909364
  • 项目类别:
    Standard Grant
  • 资助金额:
    $26.6万
  • 财政年份:
    2019
  • 负责人:
    Andrew Chien
  • 依托单位:
CRISP 2.0 Type 2: Collaborative Research: Exploiting Interdependencies Between Computing and Electrical Power Infrastructures to Maximize Resilience and Flexibility
  • 批准号:
    1832230
  • 项目类别:
    Standard Grant
  • 资助金额:
    $111.7万
  • 财政年份:
    2018
  • 负责人:
    Andrew Chien
  • 依托单位:
II-New: RIVER: A Research Infrastructure to Explore Volatility, Energy-Efficiency, and Resilience
  • 批准号:
    1405959
  • 项目类别:
    Standard Grant
  • 资助金额:
    $99.74万
  • 财政年份:
    2014
  • 负责人:
    Andrew Chien
  • 依托单位:
海外基金