CSR: Medium: Computing via Monolithic Three Dimensional Assembly of Novel Floating Gate Transistors and Thin Film Semiconductors

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Energy-proportional and low power computing, together with the increasing demands for high resiliency to random faults could benefit enormously from a "Unified Memory" - a memory cell that operate either as a dynamic cell or as a non-volatile cell, and switch seamlessly between the two states. This effort focuses on the development of such a cell based on a dual floating gate concept. The gate stack is optimized to low voltage operation. Because the dynamic storage mode relies on direct tunneling, the electric fields required are modest, and ALD methods are used to construct robust oxides, this device has potential for high endurance when operating in the dynamic storage mode. The device has a relatively low leakage compared to a DRAM cell and thus needs less frequent refreshing. The read is fast - almost SRAM speeds - and non-destructive, reducing power needs. Conversion between dynamic and non-volatiles modes is very fast - an entire row at a time, and consumes a lot less power than interfacing to a solid-state drive. The device can simultaneously store a non-volatile bit with a different volatile bit enabling fast in-situ check-pointing and rollback or state-saving to improve error resiliency.