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SHF: Medium: Collaborative Research: Building Critical Systems with Verifiable Properties Using Gate Level Analysis

SHF: Medium: Collaborative Research: Building Critical Systems with Verifiable Properties Using Gate Level Analysis
SHF:中:协作研究:使用门级分析构建具有可验证属性的关键系统
批准号:
1162177
负责人:
Ryan Kastner
金额:
$40.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2012
资助国家:
美国
项目状态:
已结题
起止时间:
2012-09-01 至 2015-08-31

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中文摘要
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英文摘要
Computer performance has doubled many times over during the past 40 years, but the very techniques used to achieve these performance gains have made it increasingly difficult to build systems that are provably safe, secure, or reliable. This fact significantly impedes progress in the development of our most safety-critical embedded systems such as those found in medical, avionic, automotive, and military systems. A transformation in the way that these systems are created is needed, one that uses new hardware design techniques, computer architectures, and programming languages to create classes of hardware/software systems with formal and provable safety properties that are verifiable all the way down to the implementation level of bits and logic gates.This research will change the way that hardware and embedded systems designers approach the problem of provable properties, enabling them to directly control and analyze the system at the lowest level and to statically determine if their designs are in compliance with a given policy. For example, if a system must be real-time this property can be verifiable for a full system, from gates to software, by ensuring that the architecture design carefully manages interference through a set of new hardware primitives, software designed to exploit these new primitives, specialized hardware analysis tools, and new design languages. To ensure this technology will have impact beyond academia the PIs are making these new technologies available and accessible through easy to use tools, continuing to include undergraduates at all levels of research to help train a new generation of engineers capable of designing safety-critical systems, and integrating concepts from information assurance into their extensive outreach activities. Over the long term this research will help create the skills and tools that embedded system engineers need to evaluate the trustworthiness of their systems, and it will ease the development of those critical systems on which we all depend on for our safety and livelihood.
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Collaborative Research: SaTC: CORE: Medium: Hardware Security Insights: Analyzing Hardware Designs to Understand and Assess Security Weaknesses and Vulnerabilities
  • 批准号:
    2247755
  • 项目类别:
    Continuing Grant
  • 资助金额:
    $57.1万
  • 财政年份:
    2023
  • 负责人:
    Ryan Kastner
  • 依托单位:
REU Site: Engineers for Exploration
  • 批准号:
    2244123
  • 项目类别:
    Standard Grant
  • 资助金额:
    $42.0万
  • 财政年份:
    2023
  • 负责人:
    Ryan Kastner
  • 依托单位:
REU Site: Engineers for Exploration
  • 批准号:
    1852403
  • 项目类别:
    Standard Grant
  • 资助金额:
    $39.0万
  • 财政年份:
    2019
  • 负责人:
    Ryan Kastner
  • 依托单位:
Student Travel Support for the International Symposium on Hardware-Oriented Security and Trust (HOST)
  • 批准号:
    1830895
  • 项目类别:
    Standard Grant
  • 资助金额:
    $1.8万
  • 财政年份:
    2018
  • 负责人:
    Ryan Kastner
  • 依托单位:
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