CAREER: Combating Dark Silicon through Specialization: Communication-Aware Tiled Many-Accelerator Architectures

研究人员预测，在接下来的几年里，计算机行业的S在计算性能方面的稳步增长将会放缓，甚至完全停止，因为一种被称为黑暗硅的情况。暗硅是功率密度增加的结果，这将使微芯片的某些部分必须断电。黑暗硅的后果可能是广泛的，限制了社会的方方面面-从医学、商业到娱乐-从计算技术的进步中获得的日益增长的好处。一种解决方案是专业化。随着能够从高级编程语言(如C语言)生成电路的高级综合工具的出现，现在可以实现适用于任何应用的专用加速器，其效率是通用微处理器的10-100倍。计算行业需要新的架构范例来组织数千个这样的加速器。该项目设想未来的计算平台由领域特定的块组成，每个块都有10-100个专门的加速器。研究团队将通过两个方面的创新来推进这一愿景。首先，通过发明一种新的内存互连子系统，能够让这些专门的核心向其提供数据。其次，将针对不同的应用领域发明规范的瓷砖，以便更广泛的研究社区进行研究。该团队将研究瓷砖的内存互连系统，以识别多加速器架构的独特功能：间歇性使用加速器、突发通信以及需要在专门的核心之间共享内存。在设计多加速器的瓦片时，团队将开发一种新的描述语言，描述瓦片的计算和通信能力，并将它们与工作负载的图形表示相匹配。为了提供更广泛的影响，该项目开发的工具、规范设计和模型将提供给更广泛的研究社区，以使专业架构的研究和最终商业化成为可能。由于提高公众的技术素养对于培养负责任的行为至关重要，综合教育计划侧重于所有年龄段：通过研讨会和演讲接触到K-12学生；通过研究机会和课程提供接触到本科生和研究生；以及更广泛的费城社区。

Researchers have predicted that, in the coming years, the computer industry?s steady gains in computing performance will slow and even cease all together because of a condition known as Dark Silicon. Dark Silicon is the result of an increase in power density that will make it necessary to leave sections of a microchip powered off. The consequences of Dark Silicon could be widespread, limiting the increasing benefits all aspects of society---from medicine, commerce to entertainment----have reaped from advances in computing. One solution is specialization. With the advent of high-level synthesis tools capable of generating circuits from high-level programming languages such as C, it is now possible to realize specialized accelerators for any application with 10-100x the efficiency of general purpose microprocessors. The computing industry needs new architecture paradigms to organize thousands of these accelerators. This project envisions the computing platform of the future as comprised of domain specific tiles, each with 10-100 specialized accelerators. The research team will advance this vision with innovations in two aspects. First, by inventing a new memory-interconnect subsystem capable of keeping these specialized cores fed with data. Second, canonical tiles will be invented for different application domains that can be studied by the wider research community. The team will study memory-interconnect systems for tiles in a manner that recognizes the unique features of many-accelerator architectures: intermittent usage of accelerators, bursts of communication, and the need to share memory between specialized cores. While designing tiles of many-accelerators, the team will develop a new description language that describes the computation and communication capabilities of a tile and matches them with a graph representation of the workload. To provide broader impact, the tools, canonical designs, and models developed by this project will be made available to the wider research community to enable the study and eventual commercialization of specialized architectures. As increasing the technological literacy of the general public is essential to cultivating responsible behavior, the integrated educational plan focuses on all age groups: it reaches K-12 students through workshops and presentations; undergraduate and graduate students through research opportunities and course offerings; and the greater Philadelphia community.