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EAGER:Real-time Semantics for the ParalleX Execution Model to Enable Single-Image Multicore Embedded Computing

EAGER:Real-time Semantics for the ParalleX Execution Model to Enable Single-Image Multicore Embedded Computing
EAGER:ParalleX 执行模型的实时语义以实现单图像多核嵌入式计算
批准号:
1352969
负责人:
Thomas Sterling
金额:
$23.0万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2013
资助国家:
美国
项目状态:
已结题
起止时间:
2013-10-01 至 2016-09-30

项目摘要

项目成果

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中文摘要
翻译
现代计算的两个极端是占用数千平方英尺的千万亿次运算性能的超级计算机和手机、汽车和电视遥控器中的嵌入式计算。然而,这些明显不同类别的计算设备有许多共同的特性和要求,事实上,它们正在趋同。功率、可靠性、多核、效率和可编程性是这两种历史上分离的形式共享的许多要求之一。多核挑战需要一种新的策略来组织和执行并发任务,该策略被称为“计算模型”或“执行模型”。通常,嵌入式计算机已由内核单独编程以保证实时操作。但随着性能要求的增长,嵌入式处理器将不得不依赖多核来实现所需的响应时间。超级计算机依赖每插槽内核数呈指数级增长的多核组件来提供随技术进步而提高的性能。该项目正在生产新版本的Parallex执行模型,以支持嵌入式实时多核操作,同时为未来的超级计算机注入用于自省的实时语义,从而实现动态自适应资源管理和任务调度。这进一步推进了未来的超级计算机,因为当前的趋势是用类似于IBM PowerPC体系结构或Intel Xeon Phi体系结构的嵌入式处理器的轻量级核心来取代重量级核心,如IBM Power体系结构或Intel x86体系结构。其他超级计算机项目正在探索将ARM嵌入式内核用于高性能系统。Parallex实时执行模型的推出将把嵌入式控制计算机和高性能计算机统一起来,相互支持,互惠互利。该项目的主要成果将是一个新的运行时系统,可以同时服务于嵌入式和高性能计算系统,以及一个编程接口,以促进两者的可扩展应用程序开发。该项目的更广泛的意义在于,它将极大地增强美国在计算关键领域的竞争力,并促进国家经济发展,同时解决促进两者进步的关键挑战。超级计算领域正面临着如何继续利用技术进步的重大挑战,而带有实时自省的Parallex执行模型正在提供指导原则,以支持体系结构、编程方法以及系统软件和工具的联合设计。嵌入式控制计算机需要能够对单系统映像使用并行处理,以便于编程和自适应地利用资源。Parallex将提供这种能力。最后,通过该项目的工作,未来的嵌入式处理器将成为下一代高性能计算的构建块,以在十年内实现亿级性能。
英文摘要
Two extremes of modern computing are supercomputers in the Petaflops performance regime taking up thousands of square feet and embedded computing found in cell phones, automobiles, and TV remote controls. Yet these apparently disparate classes of computing devices have many properties and requirements in common and, in fact, are converging. Power, reliability, multicore, efficiency, and programmability are among the many demands that these two historically separate forms share. The multicore challenge demands a new strategy for organizing and conducting concurrent tasks, which is referred to as a "model of computation" or alternatively an "execution model". Typically embedded computers have been programmed individually by cores to guarantee real-time operation. But as their performance requirements grow, embedded processors will have to depend on multiple cores to achieve needed response time. Supercomputers are relying on multicore components with exponentially growing number of cores per socket to deliver increased performance with technology advances. This project is producing a new version of the ParalleX execution model to support embedded real-time multicore operation while imbuing future supercomputers with the semantics of real-time for introspection, enabling dynamic adaptive resource management and task scheduling. This further advances future supercomputers, as a current trend is to replace heavyweight cores such as the IBM Power architecture or the Intel x86 architecture with lightweight cores similar to embedded processors like the IBM PowerPC architecture or the Intel Xeon Phi architecture. Other supercomputer projects are exploring the use of the ARM embedded cores for high performance systems. The availability of the ParalleX real-time execution model will unify both embedded control computers and high performance computers for mutual support and benefit. Key results of this project will be a new runtime system that can serve both embedded and high performance computing systems and a programming interface to facilitate scalable application development of both.The project's broader significance is that it will dramatically strengthen US competitiveness in both realms of computing-critical domains and enhance the nation?s economic development while addressing key challenges to the advancement of both. The field of supercomputing is facing a major challenge in how to continue to exploit technology advancement and the ParalleX execution model augmented with real-time introspection is providing the guiding principles to support co-design of architecture, programming methods, and system software and tools. Embedded control computers need to be able to use parallel processing with a single-system image for ease of programming and adaptive resource utilization. ParalleX will provide this capability. Finally, through the work of this project, future embedded processors will become the building blocks of the next generation of high performance computing to achieve exascale performance by decade's end.
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I-Corps: Low False Negative 3-D Facial Recognition
  • 批准号:
    1830782
  • 项目类别:
    Standard Grant
  • 资助金额:
    $5.0万
  • 财政年份:
    2018
  • 负责人:
    Thomas Sterling
  • 依托单位:
HPC Education Through Formal On-line On-Demand Curriculum
  • 批准号:
    1349527
  • 项目类别:
    Standard Grant
  • 资助金额:
    $20.0万
  • 财政年份:
    2013
  • 负责人:
    Thomas Sterling
  • 依托单位:
CI-P: REFT - A Reconfigurable Execution Framework Testbed for data-driven and extreme scale computing
  • 批准号:
    1205518
  • 项目类别:
    Standard Grant
  • 资助金额:
    $9.88万
  • 财政年份:
    2012
  • 负责人:
    Thomas Sterling
  • 依托单位:
SHF: Large: Collaborative Research: PXGL: Cyberinfrastructure for Scalable Graph Execution
  • 批准号:
    1160602
  • 项目类别:
    Continuing Grant
  • 资助金额:
    $70.0万
  • 财政年份:
    2011
  • 负责人:
    Thomas Sterling
  • 依托单位:
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