EAGER:Real-time Semantics for the ParalleX Execution Model to Enable Single-Image Multicore Embedded Computing

现代计算的两个极端是占据数千平方英尺的Petaflops性能体系的超级计算机和在手机，汽车和电视遥控器中发现的嵌入式计算。然而，这些明显不同的计算设备类别具有许多共同的属性和要求，并且实际上正在融合。功率、可靠性、多核、效率和可编程性是这两种历史上独立的形式所共有的许多需求之一。多核的挑战需要一种新的策略来组织和执行并发任务，这被称为“计算模型”或“执行模型”。典型的嵌入式计算机已经通过内核单独编程以保证实时操作。但随着性能需求的增长，嵌入式处理器将不得不依赖于多个内核来实现所需的响应时间。超级计算机依赖于多核组件，每个插槽的核心数量呈指数级增长，以随着技术进步提供更高的性能。该项目正在开发一个新版本的ParalleX执行模型，以支持嵌入式实时多核操作，同时为未来的超级计算机注入实时自省的语义，实现动态自适应资源管理和任务调度。这进一步推动了未来的超级计算机，因为当前的趋势是用类似于嵌入式处理器（如IBM PowerPC架构或Intel Xeon Phi架构）的轻量级内核取代IBM Power架构或Intel x86架构等重量级内核。其他超级计算机项目正在探索将ARM嵌入式内核用于高性能系统。ParalleX实时执行模型的可用性将统一嵌入式控制计算机和高性能计算机，以便相互支持和受益。该项目的主要成果将是一个新的运行时系统，可以同时服务于嵌入式和高性能计算系统和编程接口，以促进可扩展的应用程序开发都。该项目的更广泛的意义是，它将大大加强美国在这两个领域的计算关键领域的竞争力，并提高国家？中国的经济发展，同时解决两个方面的关键挑战。超级计算领域正面临着如何继续利用技术进步的重大挑战，而增强了实时内省的ParalleX执行模型为支持架构、编程方法以及系统软件和工具的协同设计提供了指导原则。嵌入式控制计算机需要能够使用单系统映像的并行处理，以便于编程和自适应资源利用。ParalleX将提供此功能。最后，通过本项目的工作，未来的嵌入式处理器将成为下一代高性能计算的构建块，以实现十年末的艾级性能。

Two extremes of modern computing are supercomputers in the Petaflops performance regime taking up thousands of square feet and embedded computing found in cell phones, automobiles, and TV remote controls. Yet these apparently disparate classes of computing devices have many properties and requirements in common and, in fact, are converging. Power, reliability, multicore, efficiency, and programmability are among the many demands that these two historically separate forms share. The multicore challenge demands a new strategy for organizing and conducting concurrent tasks, which is referred to as a "model of computation" or alternatively an "execution model". Typically embedded computers have been programmed individually by cores to guarantee real-time operation. But as their performance requirements grow, embedded processors will have to depend on multiple cores to achieve needed response time. Supercomputers are relying on multicore components with exponentially growing number of cores per socket to deliver increased performance with technology advances. This project is producing a new version of the ParalleX execution model to support embedded real-time multicore operation while imbuing future supercomputers with the semantics of real-time for introspection, enabling dynamic adaptive resource management and task scheduling. This further advances future supercomputers, as a current trend is to replace heavyweight cores such as the IBM Power architecture or the Intel x86 architecture with lightweight cores similar to embedded processors like the IBM PowerPC architecture or the Intel Xeon Phi architecture. Other supercomputer projects are exploring the use of the ARM embedded cores for high performance systems. The availability of the ParalleX real-time execution model will unify both embedded control computers and high performance computers for mutual support and benefit. Key results of this project will be a new runtime system that can serve both embedded and high performance computing systems and a programming interface to facilitate scalable application development of both.The project's broader significance is that it will dramatically strengthen US competitiveness in both realms of computing-critical domains and enhance the nation?s economic development while addressing key challenges to the advancement of both. The field of supercomputing is facing a major challenge in how to continue to exploit technology advancement and the ParalleX execution model augmented with real-time introspection is providing the guiding principles to support co-design of architecture, programming methods, and system software and tools. Embedded control computers need to be able to use parallel processing with a single-system image for ease of programming and adaptive resource utilization. ParalleX will provide this capability. Finally, through the work of this project, future embedded processors will become the building blocks of the next generation of high performance computing to achieve exascale performance by decade's end.