Collaborative Research: Integrated Graphene NEMS Switch ESD Protection for Low-Power ICs

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ECCS Prop. No. 1405059Proposal Title: Collaborative Research: Graphene NEMS Switch ESD Protection Circuit for Energy-Efficient ICsAward GoalDeveloping graphene-based mechanical switches as a future reliability solution to electrostatic discharge failures to next-generation energy-efficient integrated circuitsNontechnical AbstractAside from the performance, reliability is the key concern to any integrated circuits (ICs) and systems. Electrostatic discharge (ESD) failure is regarded as one of the most significant reliability problems to ICs and electronic systems, which results in billions of dollars of revenue losses each year to the electronic industry. Essentially, no electronic systems, including smartphones, tablets, personal computers, television sets, wireless routers, implantable biomedical devices, etc., may survive the market without proper and robust ESD protection measures in place, because the inevitable ESD surges represent a live threat to any electronic products due to damages in real world. As microelectronics technologies continue advance as represented by the aggressive scaling down of its feature sizes and higher integration level, the decade-long traditional ESD protection solutions utilizing active electronic devices can no longer be acceptable because the inherent parasitic effects associated with any ESD protection devices will significantly degrade the performance of ICs and systems. For example, the leakage current associated with an ESD structure will become relatively too high for the next-generation energy-efficient electronic products. A completely new ESD protection concept is proposed and revolutionary graphene-based mechanical switch structures will be developed in this work as a potential ESD protection solution. Because of its mechanical nature, the graphene switches will provide adequate ESD protection to ICs without inherent leakage current, which shall enable next-generation energy-efficient ICs and systems that, in plain language, translates into lower power consumption, hence, longer battery time for an electronic product. If successful, the novel graphene switch ESD protection solution shall make immediate impacts to the humanity by helping to create a greener society.The UCR-UCLA collaboration will boost interdisciplinary research between Electrical Engineering and Materials Science beyond the campus boundaries. The academic-industrial collaboration plan will have great social impacts, including technical and economic benefits to the American Microelectronics industry. Integrated research-education activities are proposed to expose students to contemporary micro/nano-electronics reliability research and the Microelectronics industry, as well as to train technically and globally competent workforces for the America. Underrepresented minority students are encouraged to involve in related research activities.Technical AbstractElectrostatic Discharge (ESD) failure is becoming the most devastating reliability problem to integrated circuits (IC) and systems as IC technologies advance into nano scale, which requires on-chip ESD protection. Meanwhile, emerging nano technologies also requires adequate ESD protection to enable reliable real-world applications. For decades, traditional ESD protection relies on PN-junction-based structures, which no longer work for energy-efficient ICs and nano electronics. Particularly, ESD-induced leakage becomes increasingly intolerable to ultra-low-power and high-reliable ICs, such as energy-efficient ICs for green systems including mobile electronics and extremely-reliable implantable biomedical devices, etc. Graphene, with super electrical and thermal conductivity, as well as thin layer and mechanical strength, is ideal for making a new breed of ESD protection structures. The investigators at the University of California propose a revolutionary graphene NEMS (nano electromechanical system) switch ESD protection concept as a potential integrated design-for-reliability (DfR) solution for green ICs to address the emerging on-chip ESD protection challenges. This research will 1) develop Graphene super ESD line discharger for energy-efficient ICs, 2) develop Graphene NEMS switch ESD protection mechanism and structures for ultra-low-power ICs, 3) develop CMOS-compatible Graphene ESD protection structure fabrication process, and 4) develop Graphene-based ESD protection device models for IC design demonstration. The novelty is to take full use of graphene ballistic electrical and thermal transport properties, and super mechanical strength feature, to achieve zero-leakage, low-parasitic and robust ESD protection for next-generation energy-efficient ICs.