Mixed Signal Electronic Technologies: Joint Initiative Between NSF and SRC : Three-Dimensional Impedance Engineering of Substrates for Mixed Signal Integrated Circuit Applications

0120368Xie基于Si VLSI的混合信号集成电路存在技术需求。这种技术将能够降低混合信号IC的形状因子、功耗和电路设计复杂性，这些IC是便携式电子产品、个人通信器、计算机硬盘驱动器的读写通道和用于互联网接入的调制解调器的核心。目前，串扰问题阻碍了技术的进步，对此没有可行的解决方案。PI提出了一个创新的解决方案。在噪声产生电路和噪声敏感电路之间插入类似于壕沟的晶片上的多孔Si区域，以隔离电磁干扰（EMI）。这种隔离是通过多孔硅区的高阻抗性质实现的，与硅衬底的替代路径相比，EMI到达真正的接地。相同的多孔Si区域也可用于将高性能无源元件（电感器和电容器）与衬底隔离。类似的多孔硅壕沟可以通过用金属涂覆内部孔表面而转化为高导电区域。高导电区域可用作RF干扰的接地屏蔽。或者，可以制造贯穿晶片的多孔Si“柱”，随后去除多孔Si。这将导致深过孔。 金属可以被引入到通孔中，导致用于屏蔽电磁干扰的法拉第笼型结构。这项研究的恰当名称是基板的三维阻抗工程。在这项研究中，PI将仔细检查所有三种RF串扰隔离方法的有效性。他们将专注于从100 MHz到40 GHz以上的频率范围。这是硅基混合信号集成电路在不久的将来的目标频率范围。通过将这种多孔硅基综合工艺模块引入硅超大规模集成电路工艺流程，他们将为当今硅混合信号IC技术中最具挑战性的几个问题提供独特的解决方案。他们的研究将解决以下与实现创新相关的关键问题。这些问题包括隔离的有效性，长期稳定性的隔离区，首选的掩蔽方案和材料，引入金属到多孔硅区域的方法，多孔硅的机械完整性与无金属涂层，与硅超大规模集成电路加工的兼容性，和潜在的污染问题。 它将从项目开始时的主要材料和加工问题转移到项目结束时的RF电路制造和测试。该研究将与生产测试芯片的科胜讯公司（Conexant）和支持我们通过SRC进行多孔硅研究的Agere Systems公司（Agere Systems）合作开展，该公司是这一具有战略意义的领域的初始研究的发起者。除了预期的技术影响外，拟议的研究还将发挥重要作用，通过让新一代工程师接触信息技术的前沿，培养他们。对这样一个项目进行论文研究将使他们在基础材料科学的综合领域受到教育，并通过与工业界的合作对实际设备的要求有敏锐的认识。他们将成为创新劳动力的一员，这是我们社会繁荣的动力。

0120368XieTechnological demand exists for mixed-signal integrated circuits based on Si VLSI. Such technology will enable the reduction of the form factor, power consumption, and circuit design complexity of mixed-signal IC's that are the core of portable electronics, personal communicators, the read-write channels of computer hard drives, and modems for internet access. The advancement of the technology is currently hampered by the cross-talk issue, for which there is no viable solution insight.The PIs propose an innovative solution to the problem. Through-the-wafer porous Si regions analogous to a moat are inserted between the noise producing and noise sensitive circuits to isolate electromagnetic interference (EMI). Such isolation is achieved via the high impedance nature of the porous Si region comparing to the alternative pathway of Si substrate for the EMI to reach true ground. The same porous Si regions can also be used to isolate high performance passive components (inductors and capacitors) from the substrate. Similar porous Si moat can be converted to highly conductive regions by coating the internal pore surfaces with metal. Highly conductive regions can serve as grounded shields for RF interference. Alternatively, through-the-wafer porous Si "posts" can be fabricated with porous Si removed afterward. This will result in deep vias. Metal can be introduced into the vias, resulting in Faraday cage type of structures for shielding electromagnetic interference. An appropriate name for the proposed research is three-dimensional impedance engineering of the substrate.In the proposed research, The PIs will scrutinize the effectiveness of all three approaches for RF cross-talk isolation. They will focus on the frequency range from 100 MHz up to above 40 GHz. This is the targeted frequency range by Si-based mixed-signal integrated circuits for the near future. By introducing this porous Si-based comprehensive process module into Si VLSI process flow, they will provide a unique solution to several of the most challenging issues present today in the Si mixed-signal IC technology.Their research will address the following critical issues relevant to the realization of the innovation. The issues include the isolation effectiveness, long-term stability of the isolation region, the preferred masking scheme and material, the method for introducing metal into the porous Si region, the mechanical integrity of the porous Si with and without metal coatings, the compatibility with Si VLSI processing, and potential contamination concerns.The proposed research encompasses materials science and electrical engineering. It will migrate from mostly material and processing issues at the beginning of the project, to RF circuit fabrication and testing towards the end of the project. The research will be carried out in collaboration with Conexant where their test chips will be fabricated, and Agere Systems (supporting our research in porous Si via SRC) where their initial study into this strategically important field started.In addition to the expected technological impact, the proposed research will serve the important function of educating a new generation of engineers by exposing them to the frontier of the information technology. Conducting thesis research on such a project will give them an education in the combined areas of fundamental materials science and a keen sense of the requirement of practical devices through the collaboration with industry. They will become members of the innovative workforce that has been the drive force for the prosperity of our society.