SBIR Phase II: Defect Mapping Instrument for Optimizing Wafer Manufacturing Process
SBIR Phase II: Defect Mapping Instrument for Optimizing Wafer Manufacturing Process
批准号:
1430690
负责人:
Araz Yacoubian
金额:
$74.99万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2014
资助国家:
美国
项目状态:
已结题
起止时间:
2014-08-01 至 2016-11-30
中文摘要
这个小企业创新研究(SBIR)第二阶段项目的更广泛的影响/商业潜力是,它将通过提供一种增加产量和降低制造成本的计量工具,使半导体制造业受益。该项目开发了一种非接触式、非破坏性的工具,可以快速扫描晶圆,生成地下缺陷图,以定位和最小化集成电路制造过程中的缺陷。最终用户将受益于由于产量增加而导致的电子产品成本降低。环境效益包括减少晶圆加工过程中浪费的晶圆和相关材料和化学品的使用。该技术的其他用途是作为实验室仪器,为科学界提供了一种新的地下表征工具。半导体在我们的生活中无处不在,使它们(以及容纳它们的产品)更快、更便宜、更小的趋势是显而易见的。业界大声疾呼需要测试设备来跟上这一趋势,但目前的技术还远远不够。这个小企业创新研究(SBIR)二期项目是开发一种检测工具,能够检测半导体晶圆检测的地下特征和缺陷。在晶圆制造中,从裸晶圆开始,每一步都可能导致缺陷,如果不加以检测,可能会降低良率并增加成本。由于存在吸收层,使用标准成像技术无法检测到某些埋藏缺陷。SBIR二期项目描述了一种非接触式、非破坏性的工具,该工具利用光学/声学技术实现快速晶圆扫描,生成地下缺陷图,以定位和最小化集成电路制造过程中的缺陷。第二阶段的成功完成将导致原型工作和商业化。
英文摘要
The broader impact/commercial potential of this Small Business Innovation Research (SBIR) Phase II project is that it will benefit the semiconductor manufacturing industry by providing a metrology tool that increases yield and reduces manufacturing cost. This project develops a non-contact, non-destructive tool that enables rapid wafer scan, producing a subsurface defect map to locate and minimize defects during integrated circuit manufacturing. The end user will benefit from the lower cost of electronics resulting from increased yield. Environmental benefits include reduction of wasted wafers and associated materials and chemicals used during wafer processing. Other use of this technology is as a laboratory instrument, providing a new subsurface characterization tool to the scientific community. Semiconductors are ubiquitous in our lives and the trend towards making them (and the products which house them) faster, cheaper and smaller are clear. The industry is vocal in its need for testing equipment to keep up with this trend, but current technologies fall short.This Small Business Innovation Research (SBIR) Phase II project is to develop an inspection tool that is capable of detecting subsurface features and defects for semiconductors wafer inspection. In the wafers manufacturing, starting from the bare wafer, each step can lead to defects, which, if not detected, can lower yield and increase cost. Certain buried defects are not detectable using standard imaging techniques due to the presence of absorptive layers. This SBIR Phase II project describes a non-contact, non-destructive tool that utilizes an optical/acoustic technique that enables rapid wafer scan, producing a subsurface defect map to locate and minimize defects during integrated circuit manufacturing. Successful completion of the Phase II will lead to prototype work and commercialization.
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SBIR Phase I: Defect Mapping Instrument for Optimizing Wafer Manufacturing Process
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批准号:1315026
-
项目类别:Standard Grant
-
资助金额:$14.99万
-
财政年份:2013
-
负责人:Araz Yacoubian
-
依托单位:
SBIR Phase I: Electro-Optic Sensor for Real-Time Defect Detection During Integrated Circuits (IC) and Microelectromechanical Systems (MEMS) Wafer Growth
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批准号:0318517
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项目类别:Standard Grant
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资助金额:$10.0万
-
财政年份:2003
-
负责人:Araz Yacoubian
-
依托单位:
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