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SBIR Phase II: Defect Mapping Instrument for Optimizing Wafer Manufacturing Process

SBIR Phase II: Defect Mapping Instrument for Optimizing Wafer Manufacturing Process
SBIR 第二阶段:用于优化晶圆制造工艺的缺陷测绘仪器
批准号:
1430690
负责人:
Araz Yacoubian
金额:
$74.99万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2014
资助国家:
美国
项目状态:
已结题
起止时间:
2014-08-01 至 2016-11-30

项目摘要

项目成果

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中文摘要
翻译
小型企业创新研究(SBIR)第二阶段项目的更广泛影响/商业潜力是,它将通过提供一种提高产量和降低制造成本的计量工具,使半导体制造业受益。该项目开发了一种非接触式、非破坏性工具,能够快速扫描晶片,生成亚表面缺陷图,以定位并最大限度地减少集成电路制造过程中的缺陷。最终用户将受益于由于产量增加而导致的电子产品成本的降低。环境效益包括减少在晶圆加工过程中使用的晶圆及相关材料和化学品的浪费。这项技术的其他用途是作为实验室仪器,为科学界提供一种新的地下表征工具。半导体在我们的生活中无处不在,制造半导体(以及制造半导体的产品)更快、更便宜、更小的趋势是显而易见的。业界直言不讳地表示需要测试设备来跟上这一趋势,但目前的技术不足。这个小型企业创新研究(SBIR)第二阶段项目旨在开发一种能够检测半导体晶片亚表面特征和缺陷的检测工具。在硅片制造中,从裸片开始,每一步都会导致缺陷,如果不能检测到缺陷,就会降低良率,增加成本。由于吸收层的存在,使用标准成像技术无法检测到某些埋藏的缺陷。该SBIR第二阶段项目描述了一种非接触式、非破坏性的工具,该工具利用光学/声学技术实现快速晶片扫描,生成亚表面缺陷图,以定位并最小化集成电路制造过程中的缺陷。第二阶段的成功完成将导致原型工作和商业化。
英文摘要
The broader impact/commercial potential of this Small Business Innovation Research (SBIR) Phase II project is that it will benefit the semiconductor manufacturing industry by providing a metrology tool that increases yield and reduces manufacturing cost. This project develops a non-contact, non-destructive tool that enables rapid wafer scan, producing a subsurface defect map to locate and minimize defects during integrated circuit manufacturing. The end user will benefit from the lower cost of electronics resulting from increased yield. Environmental benefits include reduction of wasted wafers and associated materials and chemicals used during wafer processing. Other use of this technology is as a laboratory instrument, providing a new subsurface characterization tool to the scientific community. Semiconductors are ubiquitous in our lives and the trend towards making them (and the products which house them) faster, cheaper and smaller are clear. The industry is vocal in its need for testing equipment to keep up with this trend, but current technologies fall short.This Small Business Innovation Research (SBIR) Phase II project is to develop an inspection tool that is capable of detecting subsurface features and defects for semiconductors wafer inspection. In the wafers manufacturing, starting from the bare wafer, each step can lead to defects, which, if not detected, can lower yield and increase cost. Certain buried defects are not detectable using standard imaging techniques due to the presence of absorptive layers. This SBIR Phase II project describes a non-contact, non-destructive tool that utilizes an optical/acoustic technique that enables rapid wafer scan, producing a subsurface defect map to locate and minimize defects during integrated circuit manufacturing. Successful completion of the Phase II will lead to prototype work and commercialization.
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SBIR Phase I: Defect Mapping Instrument for Optimizing Wafer Manufacturing Process
  • 批准号:
    1315026
  • 项目类别:
    Standard Grant
  • 资助金额:
    $14.99万
  • 财政年份:
    2013
  • 负责人:
    Araz Yacoubian
  • 依托单位:
SBIR Phase I: Electro-Optic Sensor for Real-Time Defect Detection During Integrated Circuits (IC) and Microelectromechanical Systems (MEMS) Wafer Growth
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  • 项目类别:
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  • 资助金额:
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  • 财政年份:
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  • 负责人:
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国内基金
海外基金
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  • 项目类别:
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  • 批准年份:
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  • 负责人:
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  • 依托单位:
基于数字增强干涉的Phase-OTDR高灵敏度定量测量技术研究