SBIR Phase I: Defect Mapping Instrument for Optimizing Wafer Manufacturing Process

SBIR 第一阶段：用于优化晶圆制造工艺的缺陷测绘仪器

• 批准号: 1315026
• 负责人: Araz Yacoubian
• 金额: $ 14.99万
• 依托单位: Ler Technologies
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2013
• 资助国家: 美国
• 起止时间: 2013-07-01 至 2013-12-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1315026&HistoricalAwards=false
• 关键词: SBIR; Phase; Defect; Mapping; Instrument

This Small Business Innovation Research project will investigate the feasibility of detecting subsurface defects in semiconductors. Integrated circuit manufacturing involves a number of processing steps. Starting from bare wafer, each step can lead to defects, which, if not detected, can lower yield and increase cost. Certain buried defects are not detectable using standard imaging techniques due to presence of absorptive layers. This proposal describes a non-contact, non-destructive tool that utilizes optical/acoustic technique that enables rapid wafer scan, producing subsurface defect map to locate and minimize defects during integrated circuit manufacturing. When the tool is used in infrared focal plane array manufacturing line, it increases detector array operability from 95% to near 100% due to early detection of defects. The intellectual merit of the proposed activity is applying novel optical/acoustic technique for detecting subsurface features and defects. The research objectives are to demonstrate the ability to detect subsurface defects that occur in wafers during semiconductor processing. The research activities include design, fabrication and testing to demonstrate a defect map in wafers that are not detectable by surface imaging. The outcome will be a measurement tool that can rapidly identify and locate subsurface defects.The broader impact/commercial potential of this project will greatly benefit the semiconductor manufacturing industry by providing a tool that increases yield and reduce manufacturing cost. The end user will also benefit from the lower cost of electronics resulting from increased yield. Environmental benefits include reduction of wasted wafers and associated materials and chemicals used during wafer processing. Other use of this technology is as a laboratory instrument, providing a new subsurface characterization tool to the scientific community.

这个小型企业创新研究项目将研究检测半导体表面缺陷的可行性。集成电路制造涉及多个处理步骤。 从裸晶圆开始，每个步骤都可能导致缺陷，如果没有检测到，可能会降低产量并增加成本。 由于存在吸收层，使用标准成像技术无法检测某些掩埋缺陷。 该提案描述了一种非接触式、非破坏性工具，该工具利用光学/声学技术实现快速晶圆扫描，生成表面下缺陷图，以定位并最大限度地减少集成电路制造期间的缺陷。当该工具用于红外焦平面阵列生产线时，由于早期检测到缺陷，它将检测器阵列的可操作性从95%提高到接近100%。 拟议活动的智力价值是应用新的光学/声学技术来探测表面下的特征和缺陷。研究目标是展示在半导体加工过程中检测晶片中出现的次表面缺陷的能力。 研究活动包括设计、制造和测试，以展示表面成像无法检测到的晶圆缺陷图。 该项目的成果将是一种能够快速识别和定位表面缺陷的测量工具。该项目的广泛影响/商业潜力将通过提供一种提高产量和降低制造成本的工具而使半导体制造业受益匪浅。 最终用户还将受益于产量增加带来的电子产品成本降低。 环境效益包括减少浪费的晶圆以及晶圆加工过程中使用的相关材料和化学品。 该技术的其他用途是作为实验室仪器，为科学界提供新的地下表征工具。