RF-MEMScomponents, M-systems and hybrid integration

Musik研究小组的第一部分负责将射频MEMS器件集成到基于共烧结硅的硅-LTCC衬底SiCer中，并利用独特的纳米结构界面实现LTCC。SiCer是第一部分(硅处理)和C2(低温共烧陶瓷处理)的联合发明。在第二阶段，本部分第一部分的主要目标是在SiCer衬底上实现复杂的Musik射频演示器的完整系统集成。为此，在第一阶段建立的射频和MEMS组件技术平台得到了扩展，它允许在一个集成工艺中在单个SiCer衬底上同时制造所有组件和功能块。应该强调的是，不仅标准的SiMEMS，而且作为谐振器的有源元件的压电氮化铝(AlN)层也被包括在这个集成的工艺流程中。这允许MEMS的并行集成，用于将开关、调谐和振荡功能块集成到SiCer衬底的硅中。除了用于低rf信号的应用之外(如在阶段1中)，这些功能在阶段2中被扩展为更高的rf功率电平(如发射机所需)，因此需要更高的电路复杂性。除了开发合适的工艺流程集成外，还实现了一些功能块和演示系统的样本。这还包括通过使用硅基结构来冷却功率组件，以及射频MEMS与LTCC的直接电接触(不需要额外的键合导线)。在这两种情况下，这都是在与C2部分密切合作的情况下执行的。还包括部分C3，允许基于版图验证所需的多物理综合，对LTCC和硅的前后处理进行联合设计和版图。同时，在SiCer技术中对一些迭代测试结构进行了评估和实现。这使项目A组和B组能够及早核实单一机械系统的非理想效果(如联网矩阵所示)。这些结果将用于优化建模和系统综合。

Part C1 of the research group MUSIK is responsible for the process integration and realization of RF MEMS devices into the silicon-LTCC substrate SiCer based on co-sintered silicon and LTCC with a unique nanostructured interface. SiCer is a joint invention of part C1 (silicon handling) and C2 (LTCC handling). In phase 2 the primary aim of this part C1 is the realization of the complete systems integration of a complex MUSIK RF demonstrator on SiCer substrate. For this, the technological platform for RF and MEMS components established in phase 1 is extended in a way that it allows the simultaneous manufacturing of all components and functional blocks on a single SiCer substrate in an integrated process. It should be highlighted that not only standard Si MEMS but also piezoelectric aluminum nitride (AlN) layers as active elements for e.g. resonators are included into this integrated process flow. This allows for a parallel integration of MEMS for switching, tuning and oscillating functional blocks into thesilicon of SiCer substrates. Besides applications for low RF signals (as in phase 1) these functions are extended for higher RF power levels in phase 2 (as required for transmitters) and thus a higher complexity of the circuits is required. Besides the development of suitable technological process integration a number of samples of functional blocks and of the demonstrator system are realized. This also includes a cooling of power components by using silicon-based structures as well as a direct electrical contacting of RF MEMS to the LTCC (without additional bond wires). In both cases, this is performed in close cooperation with part C2. Including also part C3 allows for a joint design and layout for LTCC and silicon pre and post processing based on the multiphysical synthesis as required for layout verification. Parallel to this, a number of iterative test structures is evaluated and realized in SiCer technology. This allows the project groups A and B an early verification of non-ideal effects of single mechanical systems (as shown in the networking matrix). These results will be used for an optimized modelling and system synthesis.