EAGER: Towards Low-Latency Low-Power Heterogeneous Memory Access
EAGER: Towards Low-Latency Low-Power Heterogeneous Memory Access
批准号:
1457506
负责人:
Meikang Qiu
金额:
$6.29万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2014
资助国家:
美国
项目状态:
已结题
起止时间:
2014-08-01 至 2016-07-31
中文摘要
本项目将探索异构存储器架构的应用,以降低功耗,同时在嵌入式计算机系统中保持足够的响应时间。与处理元素的速度相比,内存设备的响应时间较慢,这被认为是主要的性能瓶颈。存储设备使用的电能,尤其是静电,被认为是计算机能源消耗的主要来源。存在各种不同类型的内存技术,每种技术都在多维权衡空间中占据一个离散点,这些权衡空间由诸如内存访问延迟、内存带宽、功耗、内存生命周期和内存设备成本等参数表示。异构内存系统代表了一种潜在的变革性发展,因为将几种不同类型的内存组合在一起,可以提供更广泛的权衡空间。本初步研究的重点是在刮刮板存储器中有效地利用异构存储器类型。预期结果包括:1)集成片上静态随机存取存储器(SRAM)、磁性随机存取存储器(MRAM)、零电容RAM (Z-RAM)技术以及片外DRAM的新型异构存储器层次结构。2)一组算法,以实现最佳的内存访问速度或有效的空间利用分配。3)一个模拟工具包,集成了常用的模拟基准,如MiBench, PARSEC和mediabbench。这项研究的广泛影响包括为当前嵌入式计算应用提供降低能耗的技术潜力,并可能在能源、功率和散热限制下实现更先进的未来嵌入式计算系统。该项目将把研究与研究生教育结合起来,无论是在课堂上还是通过学生直接参与研究。它将包括与IBM、太平洋西北实验室和英特尔的研究人员的合作。
英文摘要
This project will explore the application of heterogeneous memory architectures to reduce power consumption while maintaining adequate response times in embedded computer systems. The slower response times of memory devices as compared to the speeds of processing elements is recognized as a major performance bottleneck. Power used by memory devices, especially static power, is recognized as a major source of energy consumption in computers. There are a variety of different types of memory technologies, each occupying a discrete point in a multidimensional trade-off space represented by parameters such as memory access latency, memory bandwidth, power consumption, memory lifetime, and cost of memory devices. Heterogeneous memory systems represent a potentially transformative development because combining several different types of memory opens up a much broader range of this trade-off space. The focus of this preliminary study is on efficient use of heterogeneous memory types in a scratch-pad memory. Expected outcomes include: 1) A new heterogeneous memory hierarchy that integrates on-chip Static Random Access Memory (SRAM), Magnetic Random Access Memory (MRAM), Zero-capacitor RAM (Z-RAM) technologies, as well as off-chip DRAM. 2) a set of algorithms that achieve allocation for optimal memory access speed or efficient space utilization. 3) a simulation toolkit that integrates commonly used simulation benchmarks, such as MiBench, PARSEC, and MediaBench.The broader impacts of this research include potential for contributing technology that reduces energy consumption for current embedded computing applications, and may enable more advanced future embedded computing systems within energy, power, and thermal dissipation constraints. The project will integrate research with graduate education, both in the classroom and through direct participation of students in the research. It will include collaborations with researchers at IBM, Pacific Northwest Laboratories, and Intel.
期刊论文(0)
专著(0)
科研奖励(0)
会议论文
NSF Student Travel Grant for IEEE SmartCloud 2017
-
批准号:1842624
-
项目类别:Standard Grant
-
资助金额:$0.82万
-
财政年份:2018
-
负责人:Meikang Qiu
-
依托单位:
NSF Student Travel Grant for IEEE SmartCloud 2017
-
批准号:1743644
-
项目类别:Standard Grant
-
资助金额:$1.5万
-
财政年份:2017
-
负责人:Meikang Qiu
-
依托单位:
EAGER: Towards Low-Latency Low-Power Heterogeneous Memory Access
-
批准号:1359557
-
项目类别:Standard Grant
-
资助金额:$7.61万
-
财政年份:2013
-
负责人:Meikang Qiu
-
依托单位:
EAGER: Towards Low-Latency Low-Power Heterogeneous Memory Access
-
批准号:1249223
-
项目类别:Standard Grant
-
资助金额:$10.0万
-
财政年份:2012
-
负责人:Meikang Qiu
-
依托单位:
海外基金