SHF: Medium: Collaborative Research: Atomic scale to circuit modeling of emerging nanoelectronic devices and adapting them to SPICE simulation package

通过利用纳米科学和纳米技术的突破性发现，CMOS技术的积极扩展和随之而来的纳米级新兴技术的发明推动了21世纪计算机、信息、通信和消费电子行业的增长。作为数十亿美元半导体行业的主力，由于纳米级存在着强大的量子力学效应，CMOS技术正接近其规模极限。为了在后CMOS时代保持加速的经济增长速度，这项多大学合作研究计划设想通过两种重要方式构建VLSI技术的路线图。首先，通过利用非电荷自由度、电子自旋控制的磁化强度、超材料结构中电磁波与半导体的相互作用以及拓扑绝缘体中的拓扑态，将量子输运原理扩展到模拟基于新型半导体和二维层状材料的新兴纳米器件。其次，该研究将通过为异类电路开发行业分级的SPICE兼容紧凑型模型来系统地将这些特性从基本的原子限制扩展到电路级集成，这将定义Beyond Moore？S定律VLSI系统的前景。这项合作提案中设想的综合教育、培训和外展活动将包括K-12、本科生、研究生、女性、少数族裔和博士后研究员，通过利用参与大学现有的外展活动来推动更广泛的社会部分的科学和工程教育。使用密度泛函理论(DFT)、依赖时间的密度泛函理论(TD-DFT)、依赖时间的密度矩阵泛函理论(TD-DMFT)，将现象学的休克尔扩展到有效质量，并结合非平衡格林？S函数(NEGF)方法、量子场论和时域有限差分(FDTD)方法，在未来的VLSI系统中，将开发各种各样的计算方法来解决多尺度电路的建模问题。由拟议的研究活动产生的软件包和多尺度建模工具将为计算机芯片设计者和制造商提供对包括纳米级电子器件、自旋电子器件、光电子器件和等离子体器件在内的复杂混合基片进行建模的能力。由此产生的软件将被编写，以期使来自大学的研究人员和行业中的实践工程师能够开发自己的模块，从而提高系统功能、集成密度和运行速度。

Aggressive scaling of CMOS technology and concomitant inventions of nanoscale nascent technologies have fueled the growth of computer, information, communication and consumer electronics industries of the 21st Century by leveraging the ground-breaking discoveries in nanoscience and nanotechnology. The workhorse of multibillion-dollar semiconductor industry, the CMOS technology is approaching its scaling limit due to the strong quantum-mechanical effects present at the nanoscale. To sustain the accelerated pace of economic growth during the post-CMOS era, this multi-university collaborative research proposal envisages building the roadmap of VLSI technology in two significant ways. First, the research is mooted to extend quantum transport principles to simulate emerging nano-devices based on novel semiconductor and 2-D layered materials by exploiting non-charge based degrees of freedom, electron spin controlled magnetization, interaction between electromagnetic waves and semiconductors in metamaterial structures, and topological states in topological insulators. Second, the research will systematically scale these properties from their fundamental atomistic limits to circuit level integration by developing industry-graded SPICE-compatible compact models for heterogeneous circuits that will define the landscape of beyond Moore?s Law VLSI systems. Integrative education, training, and outreach activities envisioned in this collaborative proposal will encompass K-12, undergraduate, graduate, female, minority, and postdoctoral fellows by leveraging the existing outreach activities of participating universities in order to advance science and engineering education in broader segments of the society.Using density-functional theory (DFT), time-dependent density functional theory (TD-DFT), time-dependent density-matrix functional theory (TD-DMFT), to phenomenological Extended Huckel to effective mass, in conjunction with non-equilibrium Green?s function (NEGF) methods, quantum field theory, and finite-difference time domain (FDTD) methods, a wide variety of computational methods are going to be developed to tackle the modeling of multiscale circuits in future VLSI systems. The software packages and multiscale modeling tools resulting from the proposed research activity are going to provide computer chip designers and manufacturers the ability to model complex hybrid substrates comprising nanoscale electronic, spintronic, opto-electronic, and plasmonic devices. The resulting software is going to be written with a view to enabling researchers from universities and practicing engineers in industries to develop their own modules that will engender improved system functionality, integration density, and operational speed.