Workshop on Energy Efficient Computing

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Exponential improvements in computing performance known as the Moore's law, that drove economic growth in the 20th century, are now perceived to be stalled due to fundamental barriers of power dissipation and bandwidth associated with electronic circuits. The workshop will explore future possibilities of new types of logic circuits and interconnects to address the technical challenges associated with low power computing. Specifically, the Electrical Communications and Cyber Systems (ECCS) Division in the Engineering Directorate at NSF, and the Computing and Communication Foundations (CCF) Division at the Computer Information Sciences and Engineering (CISE) Directorate at NSF are holding a workshop in collaboration with the Semiconductor Research Corporation (SRC) to explore the future research directions in the domain of low power electronics as may be required to satisfy the needs of next generation computing by the semiconductor industry. The invitation only workshop will assemble leading experts in the field from both academia and industry research laboratories for a period of two days. The workshop will generate a report which may form the basis for NSF and SRC to formulate new programs and/or modify existing programs in the area.