CAREER: Proactive Defense Methods for Chip Integrity and Security

不安全的芯片威胁着国土安全和公民安全，特别是在军事、政府、医疗保健和交通等关键应用中。与软件不同的是，一旦集成电路制造完成，如果发现安全漏洞，芯片就无法打补丁。为了克服这一问题，该项目开发了针对攻击的对策，可以在芯片设计阶段纳入这些对策。为了提高K-12和大学生对网络安全的兴趣，PI在PI的大学联合组织了K-12扩展计划，并为国际硬件安全竞赛指导本科生研究团队。PI继续与新汉普郡科学教师协会合作，从代表性不足的群体中招收学生，并增加她所在部门的女学生与男学生的比例。硬件知识产权(IP)盗版、硬件特洛伊木马和旁路攻击等安全威胁加强了对硬件完整性和信任的担忧。该项目不再依赖于芯片制造后的广泛测试和认证，而是在设计阶段开发主动防御方法来抵御攻击。被调查的方法将显着增加攻击者绕过应用的对策，破坏原始芯片设计的难度。为了保护IP核免受反向工程和IP盗版攻击，本课题研究了一种动态偏转的混淆方法。本项目还探索了一种互锁的动态加固方法来保护片上网络免受带宽耗尽和信息泄漏的影响。将开发一个用于密码门级实施的统一对抗框架，以应对使用故障攻击和旁路攻击相结合的新攻击。

Insecure chips threaten homeland security and citizen safety, especially in critical applications in the military, government, health care, and transportation. Unlike software, once an integrated circuit is fabricated, chips cannot be patched if a security vulnerability is identified. To overcome this problem, this project develops countermeasures against attacks that can be incorporated at the chip design phase. To increase interest in cybersecurity amongst K-12 and university students, the PI co-organizes a K-12 outreach program at the PI's university and mentors undergraduate research teams for international hardware security competitions. The PI continues her working relationship with the New Hampshire Science Teachers Association to recruit students from underrepresented groups and increase the ratio of female to male students in her department.Security threats, such as hardware intellectual property (IP) piracy, hardware Trojan, and side-channel attacks, reinforce increasing hardware integrity and trust concerns. Instead of relying on extensive testing and authentication after chips are fabricated, this project develops proactive defense methods to resist attacks at the design phase. The investigated methods will significantly increase the difficulty for attackers to bypass the applied countermeasure and sabotage the original chip design. To protect IP cores from reverse engineering and IP piracy attacks, this project investigates a dynamically-deflective obfuscation method. This project also explores an interlocked dynamic hardening method to protect Networks-on-Chip from bandwidth depletion and information leaking. A unified countermeasure framework for cipher gate-level implementation will be developed to tackle new attacks using a combination of fault attacks and side-channel attacks.