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EAGER: BRAIDING: Materials to enable voltage-gateable Majorana systems in silicon using top-down fabrication techniques

渴望：编织：使用自上而下的制造技术在硅中实现电压门控马约拉纳系统的材料

基本信息

批准号：
1743986
负责人：
Alex Levchenko
金额：
$ 30万
依托单位：
University of Wisconsin-Madison
依托单位国家：
美国
项目类别：
Standard Grant
财政年份：
2017
资助国家：
美国
起止时间：
2017-08-01 至 2020-07-31
项目状态：
已结题

来源：
https://www.nsf.gov/awardsearch/showAward?AWD_ID=1743986&HistoricalAwards=false
关键词：
EAGER BRAIDING Materials enable voltage

项目摘要

Non-technical Abstract: Modern state of the art single-chip processors that go into our everyday electronic devices, such as cellphones, contain billions of transistors. This number has been doubling ever since 1971 approximately every two years following the trend of Moore's law. Weare now at the threshold of ultimate capacity, which motivates the search for new integrated circuits. This EAGER project is for novel exploratory work whose eventual goal is to create and manipulate silicon-based superconducting heterostructures in order to provide a foundation for topological quantum transistors. This project builds on recent experimental progress demonstrating that superconductivity arises in doped covalent semiconductors, and the use of Si is attractive because this material is the most common semiconductor in the modern microelectronics industry. It is therefore motivating to explore an approach where highly scalable gate control of semiconductors can be incorporated into superconducting devices for quantum computing purposes. This could be achieved by defining superconducting-semiconductor quantum circuits using metal top gates, a technology similar to that currently employed in large scale microelectronics. Under certain conditions these circuits have very special properties encoded by Majorana modes, which are excitations that enable operations that are protected by topological principles. Thus, these systems are potentially highly resistant to various sources ofdecoherence, which is the main problem in non-topological quantum processors. Implementing topological quantum computation is a grand challenge with potentially transformative societal implications. The work on the project will have an impact on development of human resources by training of graduate students and other junior scientists in quantum information, nanofabrication, characterization of qubits and materials, theoretical simulation and calculation, and experimental design and practice.Technical Abstract: This EAGER project is for novel work to explore an approach where highly scalable gate control of semiconductors can be incorporated into superconducting devices for quantum computing purposes. The proposed research aims to characterize and develop superconducting semiconductor quantum circuits supporting Majorana fermion states using metal top gates, a technology similar to that currently employed in large-scale microelectronics. The project is balanced between the experiment and theory in the Physics Department of the University of Wisconsin-Madison. Experimental goals include: (i) development of lithographically patternable and voltage-gateable superconducting layers in silicon enriched by gallium; (ii) realization of all-silicon superconducting semiconductor Josephson field effect transistors; (iii) measurements of various transport characteristics of Josephson junctions such as current voltage characteristics, current-phase relationships, and Fraunhofer interference patterns. Theoretical efforts include exploration of patternable micromagnet configurations within the superconducting silicon channel that enable formation of robust Majorana modes. Theory work additionally includes computation of essential parameters for the silicon-gallium superconductor in the presence of doping-induced inhomogeneities, modeling transport characteristics of proposed devices, and determination of the phase diagram that hosts topologically nontrivial states in terms of realistic parameters that are controllable experimentally.

非技术摘要：现代最先进的单芯片处理器进入我们的日常电子设备，如手机，包含数十亿个晶体管。自1971年以来，这个数字大约每两年翻一番，遵循摩尔定律。我们现在正处于极限容量的门槛，这激发了对新集成电路的探索。EAGER项目是一项新的探索性工作，其最终目标是创建和操纵硅基超导异质结构，为拓扑量子晶体管提供基础。该项目建立在最近的实验进展的基础上，证明超导性出现在掺杂的共价半导体中，并且Si的使用是有吸引力的，因为这种材料是现代微电子工业中最常见的半导体。因此，探索一种方法是有动机的，在这种方法中，半导体的高度可扩展的栅极控制可以被并入超导设备中用于量子计算目的。这可以通过使用金属顶栅定义超导半导体量子电路来实现，这种技术类似于目前在大规模微电子学中使用的技术。在某些条件下，这些电路具有由马约拉纳模式编码的非常特殊的性质，马约拉纳模式是使受拓扑原理保护的操作成为可能的激励。因此，这些系统对各种退相干源具有潜在的高抵抗力，这是非拓扑量子处理器中的主要问题。实现拓扑量子计算是一个巨大的挑战，具有潜在的变革性社会影响。该项目的工作将通过培训研究生和其他初级科学家在量子信息、纳米制造、量子比特和材料的表征、理论模拟和计算以及实验设计和实践方面对人力资源的开发产生影响。这个EAGER项目是为了探索一种方法，在这种方法中，可以将高度可扩展的半导体栅极控制纳入用于量子计算目的的超导设备。拟议的研究旨在表征和开发使用金属顶栅支持马约拉纳费米子状态的超导半导体量子电路，这种技术类似于目前在大规模微电子学中采用的技术。该项目在威斯康星大学麦迪逊分校物理系的实验和理论之间取得了平衡。实验目标包括：（i）在富含镓的硅中开发可光刻图案化和可电压选通的超导层;（ii）实现全硅超导半导体约瑟夫森场效应晶体管;（iii）测量约瑟夫森结的各种传输特性，如电流电压特性、电流-相位关系和夫琅和费干涉图。理论上的努力包括探索可图案化的微磁铁配置内的超导硅通道，使强大的马约拉纳模式的形成。理论工作还包括计算掺杂引起的不均匀性存在下的硅-镓超导体的基本参数，对拟议设备的传输特性进行建模，并确定在实验可控的现实参数方面托管拓扑非平凡状态的相图。

项目成果

期刊论文数量（6）

专著数量（0）

科研奖励数量（0）

会议论文数量（0）

专利数量（0）

Majorana bound states in nanowire-superconductor hybrid systems in periodic magnetic fields

DOI：
10.1103/physrevb.101.125414
发表时间：
2019-11
期刊：
Physical Review B
影响因子：
3.7
作者：
V. Kornich;M. Vavilov;M. Friesen;M. Eriksson;S. Coppersmith
通讯作者：
V. Kornich;M. Vavilov;M. Friesen;M. Eriksson;S. Coppersmith

Josephson currents in chaotic quantum dots

混沌量子点中的约瑟夫森电流

DOI：
10.1103/physrevb.97.224515
发表时间：
2018
期刊：
Physical Review B
影响因子：
3.7
作者：
Whisler, Colin M.;Vavilov, Maxim G.;Levchenko, Alex
通讯作者：
Levchenko, Alex

The effect of external electric fields on silicon with superconducting gallium nano-precipitates

外电场对超导镓纳米沉淀硅的影响

DOI：
10.1063/5.0002460
发表时间：
2020
期刊：
Journal of Applied Physics
影响因子：
3.2
作者：
Thorgrimsson, Brandur;McJunkin, Thomas;MacQuarrie, E. R.;Coppersmith, S. N.;Eriksson, M. A.
通讯作者：
Eriksson, M. A.

Controlled-Z gate for transmon qubits coupled by semiconductor junctions

用于通过半导体结耦合的传输量子位的受控 Z 门

DOI：
10.1103/physrevb.97.134518
发表时间：
2018
期刊：
Physical Review B
影响因子：
3.7
作者：
Qi, Zhenyi;Xie, Hong-Yi;Shabani, Javad;Manucharyan, Vladimir E.;Levchenko, Alex;Vavilov, Maxim G.
通讯作者：
Vavilov, Maxim G.

Topological Andreev bands in three-terminal Josephson junctions

三端约瑟夫森结中的拓扑安德烈夫能带