FoMR: Improving Microprocessor IPC for Data Center Workloads

点击翻译按钮获取中文摘要

More and more companies and institutions are moving their products and services into the cloud, increasing the number of compute cycles spent in data centers significantly. The explosive growth of such cloud computation has delivered great value to society at the cost of increasing the environmental footprint on our world. This project can improve the energy efficiency of data center systems through the design and optimization of cloud application-specific microprocessors. The research will be infused into the undergraduate curriculum at University of California Santa Cruz, educating the next generation of students on designing energy efficient, data center specific architecture and systems.This project will develop machine learning techniques to predict datacenter application behavior and apply them to processor microarchitecture. In particular, a new cross-layer approach will be developed to improve the instructions-per-cycle (IPC) performance of data center workload-optimized processors. It will explore and develop solutions for a number of challenges including offline learning of data center application behavior, leveraging machine learning models for instruction prefetching and branch prediction, and building resource and power efficient hardware to leverage the machine learning models at execution time.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.