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CAREER: Advancing STTRAM Caches for Runtime Adaptable and Energy-Efficient Microarchitectures

职业：推进 STTRAM 缓存以实现运行时适应性强且节能的微架构

基本信息

批准号：
1844952
负责人：
Tosiron Adegbija
金额：
$ 50万
依托单位：
University of Arizona
依托单位国家：
美国
项目类别：
Continuing Grant
财政年份：
2019
资助国家：
美国
起止时间：
2019-06-01 至 2025-05-31
项目状态：
未结题

来源：
https://www.nsf.gov/awardsearch/showAward?AWD_ID=1844952&HistoricalAwards=false
关键词：
CAREER Advancing STTRAM Caches Runtime

项目摘要

On-chip caches are important due to their substantial impact on the energy consumption and performance of a wide variety of computer systems, including desktop computers, embedded systems, mobile devices, servers, etc. As an alternative to traditional static random-access memory (SRAM) for implementing caches, the spin-transfer torque RAM (STTRAM) is a type of non-volatile memory that promises several advantages, such as high density, low leakage, high endurance, and compatibility with complementary metal-oxide-semiconductor (CMOS). However, STTRAM caches still face critical challenges that impede their widespread adoption, such as high write latency and energy. In addition, users of computer systems and the programs that run on the systems typically have variable resource requirements, necessitating caches that can dynamically adapt to runtime needs.This CAREER project will investigate several interrelated research problems, including: STTRAM's characteristics and how they can be leveraged for improving the energy efficiency and performance of computer systems that run diverse programs; techniques for improving the user's experience while running the programs; new architectures and management techniques for enabling STTRAM caches that are energy-efficient and can dynamically adapt to running programs? individual needs; and novel methods to address the challenges of implementing STTRAM caches in complex multicore computer systems. Ultimately, the project will develop STTRAM cache architectures that can automatically adapt to the execution needs of diverse programs, resulting in more energy-efficient and faster computer systems.The project's broader impacts include architectures and methods that will improve the performance and energy efficiency of a wide variety of computer systems for running a wide variety of programs. With the growth of the Internet of Things (IoT), spanning diverse computing and user needs, this project represents an important and necessary step towards adaptable and low-overhead computer systems. This CAREER project also seeks to foster education and diversity in science, technology, engineering, and math (STEM) fields through K-12 seminars, and by engaging and equipping a diverse group of young engineers with necessary techniques and skills to design innovative solutions for energy-efficient and adaptable Internet of Things architectures.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

片上高速缓存由于其对包括台式计算机、嵌入式系统、移动的设备、服务器等的各种计算机系统的能耗和性能的实质性影响而很重要。作为用于实现高速缓存的传统静态随机存取存储器（SRAM）的替代方案，自旋转移矩RAM（STTRAM）是一种类型的非易失性存储器，其承诺若干优点，诸如高密度、低功耗、高可靠性、低成本、高性能、高可靠性、低成本、低成本。低泄漏、高耐久性以及与互补金属氧化物半导体（CMOS）的兼容性。然而，STTRAM缓存仍然面临着阻碍其广泛采用的关键挑战，例如高写入延迟和能量。此外，计算机系统的用户和在系统上运行的程序通常具有可变的资源需求，需要能够动态适应运行时需求的高速缓存。这个CAREER项目将研究几个相互关联的研究问题，包括：STTRAM的特性以及如何利用它们来提高运行不同程序的计算机系统的能源效率和性能;在运行程序时改善用户体验的技术;新的架构和管理技术，使STTRAM高速缓存能够节能，并能动态适应运行的程序？个人需求;和新的方法来解决在复杂的多核计算机系统中实现STTRAM缓存的挑战。最终，该项目将开发STTRAM缓存架构，可以自动适应不同程序的执行需求，从而实现更节能和更快的计算机系统。该项目的更广泛影响包括架构和方法，将提高各种计算机系统的性能和能源效率，以运行各种程序。随着物联网（IoT）的发展，跨越不同的计算和用户需求，该项目代表了迈向适应性强和低开销计算机系统的重要和必要的一步。这个职业项目还旨在通过K-12研讨会促进科学，技术，工程和数学（STEM）领域的教育和多样性，并通过吸引和装备一个多样化的年轻工程师群体，使其具备必要的技术和技能，以设计创新的能源解决方案-该奖项反映了NSF的法定使命，并通过评估被认为值得支持使用基金会的知识价值和更广泛的影响审查标准。

项目成果

期刊论文数量（9）

专著数量（0）

科研奖励数量（0）

会议论文数量（0）

专利数量（0）

Energy and Performance Analysis of STTRAM Caches for Mobile Applications

DOI：
10.1109/mcsoc.2019.00044
发表时间：
2019-08
期刊：
2019 IEEE 13th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)
影响因子：
0
作者：
Kyle Kuan;Tosiron Adegbija
通讯作者：
Kyle Kuan;Tosiron Adegbija

Evaluating the performance and energy of STT-RAM caches for real-world wearable workloads

DOI：
10.1016/j.future.2022.05.023
发表时间：
2022-06
期刊：
Future Gener. Comput. Syst.
影响因子：
0
作者：
Dhruv Gajaria;Tosiron Adegbija
通讯作者：
Dhruv Gajaria;Tosiron Adegbija

ECG-Based Authentication Using Timing-Aware Domain-Specific Architecture

DOI：
10.1109/tcad.2020.3012169
发表时间：
2020-11-01
期刊：
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
影响因子：
2.9
作者：
Cordeiro, Renato;Gajaria, Dhruv;Tehranipoor, Fatemeh
通讯作者：
Tehranipoor, Fatemeh

A Study of STT-RAM-based In-Memory Computing Across the Memory Hierarchy

跨内存层次结构的基于 STT-RAM 的内存计算研究