CAREER: Hardware-Software Co-Design to Dynamically Specialize the Memory Hierarchy

几十年来，计算能力的指数级增长为研究、工业和社会带来了变革性的好处。随着登纳德缩放的优势逐渐消失，为了维持这种增长，计算机架构师必须设计出性能和能效更高的新系统。不幸的是，计算机系统越来越受到访问数据成本上升的限制，这往往占据了用于实际计算的时间和精力。该项目将设计和评估一种新的计算机系统设计，通过动态专门化每个应用程序的内存层次结构，使数据访问更快、更便宜。这个项目将继续研究人员、工业和社会所依赖的计算能力的增长。它将特别加速机器学习、社交网络和机器人等重要应用，这些应用的核心计算仍然超出当前芯片设计的能力。该项目将开发有关内存层次和专业架构的新课程，并让高中生、本科生和研究生参与研究。它将通过为本科女性举办的研究研讨会和为代表性不足的少数族裔开展的暑期实习项目来改善多样性。当前的计算机系统导致大量不必要的数据移动，因为它们的内存层次结构固定在硬件中，而对软件隐藏，因此应用程序无法控制数据的管理方式。该项目将开发一种新的硬件软件协同设计，将数据作为一流公民与计算结合在一起。应用程序将表达它们的性能目标（例如，吞吐量、服务质量和/或安全性），并且在编译器的支持下，将它们的计算分解为带有相关数据的任务。操作系统（OS）和硬件将协作地共同调度任务和数据，以便以最小的数据移动实现应用程序的目标。操作系统调度器将考虑异构片上系统（SoC）中每个核心/加速器的不同性能特征，硬件将在整个内存层次结构中合并节能核心，以实现近数据计算，同时最大限度地利用数据局部性。硬件软件协同设计为进一步研究减少数据移动提供了一个可扩展的平台，并且通过降低集成新加速器的成本，补充了行业对异构soc的投资。该奖项反映了美国国家科学基金会的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

Decades of exponential growth in computing power have yielded transformative benefits for research, industry, and society. To sustain this growth as Dennard Scaling benefits fade, computer architects must design new systems with orders-of-magnitude better performance and energy-efficiency. Unfortunately, computer systems are increasingly limited by the rising cost of accessing data, which often dominates the time and energy spent doing actual computation. This project will design and evaluate a new computer system design that makes data accesses much faster and cheaper by dynamically specializing the memory hierarchy for each application. This project will continue the growth in computation power that researchers, industry, and society have come to rely upon. It will particularly accelerate important applications like machine learning, social networking, and robotics whose core computations remain beyond the capability of current chip designs. This project will develop new curricula on memory hierarchy and specialized architectures as well as involve high school, undergraduate, and graduate students in research. It will improve diversity through research workshops for undergraduate women and a summer internship program for under-represented minorities.Current computer systems incur significant unnecessary data movement because their memory hierarchy is fixed in hardware and hidden from software, so that applications have no control over how data are managed. This project will develop a new hardware-software co-design that incorporates data as a first-class citizen alongside compute. Applications will express their performance goals (e.g., throughput, quality of service, and/or security) and, with compiler support, break their computation into tasks with associated data. The operating system (OS) and hardware will collaboratively co-schedule tasks and data so that applications' goals are achieved with minimal data movement. The OS scheduler will account for the diverse performance characteristics of each core/accelerator in a heterogeneous system-on-chip (SoC), and hardware will incorporate energy-efficient cores throughout the memory hierarchy to enable near-data computation while maximally exploiting data locality. The hardware-software co-design gives an extensible platform for further research on reducing data movement, and it complements industry investment in heterogeneous SoCs by making it inexpensive to integrate new accelerators.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.