SHF: Small: Deep Neural Network Inference on Energy-Harvesting Devices

间歇性供电的能量收集计算机是不需要电池或固定电源的复杂计算、传感和通信系统。这些能量收集设备将构成下一代物联网(IoT)应用的基础，范围从可穿戴和植入式医疗设备，到环境和大气监测，再到深空中的微型芯片卫星。要实现这些应用程序的价值，需要能够经常在本地自主(即，不需要附近其他计算机的帮助)做出决策的智能设备。例如，设备可能需要决定是否打开电池耗尽的摄像头来检测感兴趣的人，决定将哪些传感器嵌入混凝土中以收集有关老化桥梁的最有用的数据，以及决定何时将这些传感器发送回云中以及发送多少数据。近年来，基于深度神经网络的统计推理和机器学习已被证明是此类决策最成功的方法。机器学习是未来物联网设备的一个至关重要的功能，但今天的资源受限的能量收集系统不支持深度神经网络推理所需的高强度计算。该项目构建了未来间歇性物联网设备所需的软件计算机系统和硬件计算机体系结构，以实现使用机器学习的自主、智能决策。该项目生产的软件系统具有新颖的算法，使当今的采能物联网设备能够高效地做出智能决策。然后，该项目将设计新的并行计算机体系结构，这些体系结构专门为具有间歇输入功率的机器学习计算的有效操作而设计。这些架构进一步将间歇性决策的效率提高了10倍或100倍，实现了使用今天的架构无法实现的新型智能物联网应用。这些软件和硬件组件的总和解决了断断续续系统上的深度机器学习的存在问题，展示了其可行性，并实现了其对学术界、工业以及对社会重要的应用(如国防、医疗保健和民用基础设施)的好处。这个项目通过与课程课程的整合，指导来自代表性不足的少数群体的学生，以及技术型高中外展计划，为未来的多样化劳动力做出贡献。该项目克服的关键挑战是使深度神经网络推理在资源受限的间歇性设备上可行。这项任务需要架构和软件支持，以容忍频繁的间歇性电力中断，并以数百微瓦的功率运行，而不是今天的机器学习加速器所需的数十或数百毫瓦的功率。这个项目开发了近似的、间歇性的部分重新执行技术，以有效地容忍中断，而不需要不必要的检查点和恢复软件状态。该项目开发了第一个间歇安全的数据并行体系结构，将非易失性存储器与一系列简单的计算元件集成在一起。该项目包括一条通往软件和硬件原型的直接途径，并为未来架构的硅硬件实施奠定了基础。该奖项反映了NSF的法定使命，并通过使用基金会的智力优势和更广泛的影响审查标准进行评估，被认为值得支持。

Intermittently powered, energy-harvesting computers are sophisticated computing, sensing, and communicating systems that do not need a battery or tethered power source. These energy-harvesting devices will form the foundation of the next generation of internet-of-things (IoT) applications, ranging from wearable and implantable medical devices, to environmental and atmospheric monitoring, to tiny ChipSat-scale satellites in deep space. Realizing the value of these applications requires intelligent devices that can frequently make decisions locally and autonomously (i.e., without help from other nearby computers). For example, a device may need to decide whether to turn on a battery-draining camera to detect a person of interest, to decide which sensors embedded in concrete to enable to collect the most useful data about an aging bridge, and to decide when and how much data to send from these sensors back to the cloud. In recent years, statistical inference and machine learning using deep neural networks has proven the most successful method for such decision-making. Machine learning is a crucially important feature for future IoT devices, but today's resource-constrained energy-harvesting systems do not support the high-intensity computations required by deep neural network inference. This project builds the software computer systems and hardware computer architectures required by future, intermittent IoT devices to enable autonomous, intelligent decision-making using machine learning. This project produces software systems with novel algorithms that enable today's energy-harvesting IoT devices to efficiently make intelligent decisions. This project will then design novel parallel computer architectures that are designed specifically for efficient operation of machine learning computations with intermittent input power. These architectures further increase the efficiency of intermittent decision-making by 10s or 100s of times, enabling a new class of intelligent IoT applications that are not possible using today's architectures. The sum of these software and hardware components addresses the existential question of deep machine learning on intermittent systems, demonstrating its viability and realizing its benefits to academia, industry, and in applications important to society, such as defense, healthcare, and civil infrastructure. This project contributes towards a diverse future workforce, through integration with course curricula, mentoring of students from under-represented minority groups, and technical high school outreach programs.The key challenge overcome by this project is to make deep neural network inference viable on a resource-constrained, intermittent device. This task requires architecture and software support to tolerate frequent, intermittent power interruptions and to operate with hundreds of microwatts of power instead of the tens or hundreds of milliwatts required by today's machine learning accelerators. This project develops approximate, intermittent partial re-execution techniques to efficiently tolerate interruptions without the need to unnecessarily checkpoint and restore software state. The project develops the first intermittence-safe data-parallel architecture, integrating non-volatile memory with an array of simple compute elements. The project includes an immediate path to software and hardware prototypes and lays the groundwork for a future silicon hardware implementation of the architecture.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.