CCSS: Intrinsically-Linear Loadline-Envelope-Tracking (LET) Radio Transmitter Toward Wideband, Energy-Efficient, and Ultra-Fast Wireless Communications

5G及以后的无线通信将带来前所未有的服务质量，如超高速和低延迟。然而，这种演变不可避免地伴随着严重的能源效率低下，这主要是由于射频（RF）功率放大器（pa）的效率下降，这是无线系统中最耗电的模块。另一方面，现有的效率增强技术，如工业标准包络跟踪，在适应越来越宽的信号调制带宽时，预计将变得无效。本研究的总体目标是研究和展示一种新的宽带，高效，本质线性化的PA和无线电发射机架构，作为下一代节能和超高速无线通信的关键使能器。该研究的成功完成将标志着突破PA效率和线性的带宽限制的里程碑，这对无线和半导体行业的增长至关重要。需要强调的是，PA效率的提高将显著降低整个无线网络的能耗，并改善环境友好性。此外，所提出的硅集成方法为工业界面临的高成本、不可集成和制造能力有限的无线电前端开发问题提供了理想的解决方案。这对于加速新兴技术的传播和将无线连接从有限的人扩展到几乎无限的事物（即万物互联）至关重要。此外，这项研究将通过培训下一代年轻专业人员以及通过合作和数据共享，为无线和半导体行业提供基础支持。这项研究的影响将通过教育和鼓舞人心的推广工作进一步扩大和延长。下一代无线通信将具有宽带、高速和低延迟的特点，这将对射频放大器和发射机的效率和线性度带来极大的挑战。这个项目提出了一个革命性的概念，称为负载线包络跟踪（LET）发射机架构。通过将包络跟踪（ET）的范例从现有的供电调制技术转移到新的负载线调制技术，这种新架构不仅有望从根本上打破现有PA效率增强技术所施加的带宽和线性限制，而且还继承了工业标准ET系统的先进特性。本研究追求以下关键创新：1)基于负载线包络跟踪的新型无线电发射机架构，实现了射频放大器的宽带效率提高和固有线性化，这是无线通信领域的重大技术飞跃。2)一种创新的rf -模拟-数字协同设计方法，可同时实现PA的优化效率和线性度，消除了在宽调制带宽下可能导致能量效率低下的外部数字线性化的必要性。3)首次揭示了负载线调制的速度/带宽限制因素以及相应的电路和系统设计方法。4)基于高压互补金属氧化物半导体（HV-CMOS）工艺的硅集成方法，集成整个LET发射器前端，包括PA，可调谐匹配网络和高速负载线调制器，从而实现有史以来第一个完全集成，可大规模制造和低成本的单芯片解决方案。该奖项反映了美国国家科学基金会的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

The wireless communications of 5G and beyond facilitate unprecedented quality of service such as ultrahigh speed and low latency. However, this evolution is inevitably accompanied by severe energy inefficiency mainly due to the degraded efficiency of radio-frequency (RF) power amplifiers (PAs) that are the most power-consuming module in wireless systems. On the other hand, the existing efficiency-enhancement technology, e.g., industry-standard envelope tracking, is expected to become ineffective when accommodating increasingly wide modulation bandwidth of signals. The overarching goal of this research is to investigate and demonstrate a new architecture of wideband, highly efficient, and intrinsically linearized PA and radio transmitter as a key enabler to next-generation energy-saving and ultra-fast wireless communications. The successful completion of the proposed research will mark a milestone of breaking the bandwidth limitation on PA efficiency and linearity, which crucially contributes to the growth of wireless and semiconductor industries. It is important to emphasize that the enhancement of PA efficiency will significantly reduce the energy consumption of entire wireless networks with improved environmental friendliness. Moreover, the proposed silicon-integration method provides an ideal solution to the high-cost, non-integrability, and limited-manufacturing-capacity issues of radio frontend development faced by industry. This is expected to be critical in expediting the dissemination of emerging technologies and in expanding the wireless connections from finite number of people to nearly infinite number of things (i.e., Internet of Everything). Furthermore, this research will provide foundational support to wireless and semiconductor industries by training next-generation young professionals and through collaborations and data sharing. Impacts of this research will be further broadened and prolonged through educational and inspiring outreach efforts.The next-generation wireless communications will feature wideband, high speed and low latency, which leads to extreme challenges for efficiency and linearity of RF PAs and transmitters. This project proposes a transformative concept called Loadline-Envelope-Tracking (LET) Transmitter Architecture. By shifting the paradigm of envelope tracking (ET) from the existing supply-modulation technique to the new loadline-modulation technique, this new architecture not only holds the promise to fundamentally break the bandwidth and linearity limitations imposed on existing PA efficiency-enhancement technologies, but it also inherits the advanced features of the industry-standard ET system. This research pursues the following key innovations: 1) The novel radio transmitter architecture based on loadline envelope tracking enabling wideband efficiency enhancement and intrinsic linearization of RF PAs, a significant technological leap forward in wireless communications. 2) An innovative RF-analog-digital co-design methodology to concurrently achieve optimized efficiency and linearity of PA, eliminating the necessity of external digital linearization that can be energy inefficient under wide modulation bandwidths. 3) The first-ever revealing of the speed/bandwidth limiting factors for loadline modulation and the corresponding circuit and system design methodology. 4) A silicon-integration method based on high-voltage Complementary Metal Oxide Semiconductor (HV-CMOS) process to integrate the entire LET transmitter frontend involving PA, tunable matching network, and high-speed loadline modulator, leading to the first-ever fully integrated, massively manufacturable, and low-cost single-chip solution.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.