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SaTC: CORE: Small: Fast Algorithm Originated Fault Detection Scheme for Ring-LWE based Cryptographic Hardware

SaTC：CORE：小型：快速算法发起的基于 Ring-LWE 的加密硬件故障检测方案

基本信息

批准号：
2020625
负责人：
Jiafeng Xie
金额：
$ 11.43万
依托单位：
Villanova University
依托单位国家：
美国
项目类别：
Standard Grant
财政年份：
2020
资助国家：
美国
起止时间：
2020-10-01 至 2024-09-30
项目状态：
已结题

来源：
https://www.nsf.gov/awardsearch/showAward?AWD_ID=2020625&HistoricalAwards=false
关键词：
SaTC CORE Small Fast Algorithm

项目摘要

Post-quantum cryptography (PQC) refers to cryptograhic algorithms that are thought to be resistant to attacks by quantum computers. Recently, PQC has received significant attention from the research community. Ring-Learning-with-Errors (Ring-LWE) based cryptography is regarded as one of the most promising PQC candidates because of its strong security proof and ease of implementation. When the cryptographic algorithms are implemented in hardware circuits, fault detection is an essential protection strategy to fight against both natural and maliciously injected faults in cryptographic circuits. This project aims to develop novel fault detection scheme for the standard Ring-LWE based PQC.This project will develop multiplication algorithms that allow quick detection of faults for Ring-LWE based PQC. The project envisions three tasks. The first task will develop mathematical foundation for fast multiplication in Ring-LWE based PQC circuits. The second task will develop efficient fault detection scheme for the Ring-LWE based cryptography. The final task involve simulation and testing to validate above work.This project is expected to make significant impact. The outcome from this project will lead to the design of efficient Ring-LWE based PQC on hardware platform. The fault detection scheme is expected to generate secure implementation of Ring-LWE based PQC. The results and data from this project will be broadly disseminated.The repository of this project will be stored and documented as per Villanova University policy and will be accessible through: http://www.ece.villanova.edu/~jxie02/This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

后量子密码学(PQC)是指被认为能抵抗量子计算机攻击的密码算法。最近，PQC受到了研究界的极大关注。基于Ring-LWE(Ring-LWE)的密码体制因其强大的安全性和易于实现而被认为是最有前途的PQC候选方案之一。当密码算法在硬件电路中实现时，故障检测是对抗密码电路中的自然故障和恶意注入故障的重要保护策略。该项目旨在为基于Ring-LWE的标准PQC开发新的故障检测方案。该项目将开发能够快速检测基于Ring-LWE的PQC的乘法算法。该项目设想了三项任务。第一个任务是为基于Ring-LWE的PQC电路的快速乘法奠定数学基础。第二个任务是为基于Ring-LWE的密码体制开发高效的故障检测方案。最后的任务是仿真和测试，以验证以上工作的有效性，预计该项目将产生重大影响。本项目的研究成果将为在硬件平台上设计高效的基于PQC的Ring-LWE奠定基础。该故障检测方案有望产生基于Ring-LWE的PQC的安全实现。该项目的结果和数据将被广泛传播。该项目的存储库将按照维拉诺瓦大学的政策进行存储和记录，并将通过以下方式访问：http://www.ece.villanova.edu/~jxie02/This奖反映了美国国家科学基金会的法定使命，并已通过使用基金会的智力价值和更广泛的影响审查标准进行评估，被认为值得支持。

项目成果

期刊论文数量（18）

专著数量（0）

科研奖励数量（0）

会议论文数量（0）

专利数量（0）

Lightweight Hardware Implementation of Binary Ring-LWE PQC Accelerator

二元环-LWE PQC加速器的轻量级硬件实现

DOI：
10.1109/lca.2022.3160394
发表时间：
2022
期刊：
IEEE Computer Architecture Letters
影响因子：
2.3
作者：
Lucas, Benjamin J.;Alwan, Ali;Murzello, Marion;Tu, Yazheng;He, Pengzhou;Schwartz, Andrew J.;Guevara, David;Guin, Ujjwal;Juretus, Kyle;Xie, Jiafeng
通讯作者：
Xie, Jiafeng

Systolic Acceleration of Polynomial Multiplication for KEM Saber and Binary Ring-LWE Post-Quantum Cryptography

KEM Sabre 和二元环-LWE 后量子密码学多项式乘法的收缩加速

DOI：
10.1109/host54066.2022.9839980
发表时间：
2022
期刊：
2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST
影响因子：
0
作者：
Bao, Tianyou;He, Pengzhou;Xie, Jiafeng
通讯作者：
Xie, Jiafeng

HPMA-NTRU: High-Performance Polynomial Multiplication Accelerator for NTRU

DOI：
10.1109/dft56152.2022.9962336
发表时间：
2022-10
期刊：
2022 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)
影响因子：
0
作者：
Pengzhou He;Yazheng Tu;A. Khalid;Máire O’Neill;Jiafeng Xie
通讯作者：
Pengzhou He;Yazheng Tu;A. Khalid;Máire O’Neill;Jiafeng Xie

CROP: FPGA Implementation of High-Performance Polynomial Multiplication in Saber KEM based on Novel Cyclic-Row Oriented Processing Strategy

CROP：基于新颖的面向循环行处理策略的 Sabre KEM 中高性能多项式乘法的 FPGA 实现