CRII: SHF: Enabling Metal Inter-Layer Via Device Utilization for On-chip Memory in Monolithic Three-Dimensional Integrated Circuits

随着垂直尺寸导致晶体管密度的增加，单片三维集成电路(M3D IC)是一种很有前途的技术，可以满足未来的计算需求。该项目解决了与M3D IC技术相关的主要设计挑战之一，以实现节能和紧凑的集成芯片。该项目通过向研究界提供集成芯片的新型器件模型和设计策略，促进了M3D IC技术的进一步发展。研究人员正在制定一项参与计划，通过这个项目让集成电路领域中代表性不足的群体的学生参与进来。本研究开发的技术旨在开发计算机工程课程，并在行业协作的技术研讨会上展示。在M3D IC工艺中，基板层按顺序实现，这些层通过金属层间通孔(MIV)连接。该项目旨在通过利用MIV周围的衬底面积来形成MIV器件，特别是MIV电容器和MIV晶体管，从而开发出占地面积小、效率高的M3D IC设计。这给MIV设备的设计和特性带来了新的挑战，以优化形状系数和效率。该项目通过1)为M3D-IC技术中建议的MIV器件开发SPICE模型，以及2)将这些MIV器件用于片上静态随机存取存储器(SRAM)和动态随机存取存储器(DRAM)，以实现紧凑和高能效的M3D IC，从而解决了这些挑战。这项研究开发的技术为M3D IC技术在所有设计水平--器件、电路和计算机辅助设计--提供了未来的机会。该项目的成果旨在为全尺寸M3D集成电路设计的设计框架奠定基础，以满足未来的计算要求。该奖项反映了NSF的法定使命，并通过使用基金会的智力优势和更广泛的影响审查标准进行评估，被认为值得支持。

A monolithic three-dimensional integrated circuit (M3D IC) is a promising technology to meet future computational demands as transistor density increases due to the vertical dimension. This project addresses one of the primary design challenges associated with the M3D IC technology to realize energy-efficient and compact integrated chips. The project is facilitating further advances in M3D IC technology by providing novel device models and design strategies for integrated chips to the research community. The investigator is developing a participation plan to involve students from the underrepresented groups in the field of integrated circuits through this project. The techniques developed in this research are intended to be used to develop computer-engineering courses and also to be presented in technical seminars for industry collaborations.In M3D IC technology, the substrate layers are realized sequentially, and these layers are connected through metal inter-layer vias (MIVs). This project aims to develop small footprint and efficient M3D IC designs by opportunistically utilizing substrate area around MIV to form MIV-devices specifically MIV-capacitor and MIV-transistor. This brings in new challenges for designing and characterizing MIV-devices to optimize the form factor and efficiency. These challenges are addressed by this project through 1) developing SPICE models for proposed MIV-devices in M3D-IC technology, and 2) utilizing these MIV-devices for on-chip static random-access memory (SRAM) and dynamic random-access memory (DRAM) to enable compact and power-efficient M3D ICs. The techniques developed in this research are providing future opportunities for M3D IC technology at all design levels – device, circuit, and computer-aided design. The results of this project are intended to lay a foundation for a design framework for full-scale M3D IC designs to meet future computational requirements.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.