Nyquist-Rate AD-Converters with Signal Dependent Sampling Rate

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The objective is to develop methods for dynamic sampling rates in Nyquist ADCs. The ambition are methods that do not increase the effort an power due to additional analog circuitry, like additional window comparators. Starting point is the characteristics of the output signal of the quantiser in ADCs with feedback DAC.The second objective is a mathematical description and model of the feedback loop and the processing of the asynchronous ADC. In doing so the functional blocks are combined and stability criteria are derived for rules and standards for asynchronous ADCs.In a third step the theoretical work is verified on a demonstrator (test chip). It is not the primary goal just to push the FOM, but to get a model kit for asynchronous ADCs. A modular concept of the test chip with various options for evaluation and the experience in 65nm-designs and ADC-designs significantly reduces the risk of the tape out.A key aspect of the evaluation is the matching of ideal and measured characteristics. Deviations from normal conditions due to parasitic effects should be implemented in the original model to achieve full understanding of the system.