ENES: Energy-Efficient Scheduling

点击翻译按钮获取中文摘要

In this project we will study algorithmic techniques for energy savings in hardware environments, thereby supporting the processing of big data sets on the systems level. We will focus on the technique of dynamic speed scaling as the most promising approach currently known to conserve energy in microprocessor systems. The specific goal of this project is bring algorithmic results closer to practice. Most of the prior work makes idealized architectural assumptions: A processor would have a continuous unbounded speed spectrum, and speed changes could be performed at any time at no cost.We will design and analyze algorithms for the realistic scenario that a processor has a finite set of discrete speed levels. To this end we will adapt strategies known for a continuous processor speed spectrum and, more importantly, design new algorithms that are specifically tailored to the more accurate scenario with discrete speeds. The above theoretically oriented work will be complemented by thorough experiments, forming an algorithms engineering part of the project. To date none of the strategies developed in the algorithmic speed scaling literature has been implemented and tested on real-world data. We wish to overcome this deficiency. Specifically, we will build up a library of data sets and implement / test the proposed algorithms.