I-Corps: Analog Layout Design Suite

I-Corps：模拟布局设计套件

• 批准号: 2310607
• 负责人: Ramesh Harjani
• 金额: $ 5万
• 依托单位: University of Minnesota-Twin Cities
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2023
• 资助国家: 美国
• 起止时间: 2023-03-01 至 2024-02-29
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=2310607&HistoricalAwards=false
• 关键词: Corps; Analog; Layout; Design; Suite

The broader impact/commercial potential of this I-Corps project is the development of technology for state-of-the-art, mixed-signal semiconductor chips or integrated circuits. Applications range from wireless and wired communication to driverless cars, smart cities, and biomedical devices. The software is able to reduce the layout design time by 90 times compared to manual/human design time, while ensuring that the output quality is comparable. Changes in the design process are crucial for the analog integrated circuit market to keep up with the demand for chips and new applications. This technology can provide faster speeds over current processes while reducing user input and effort. This software also opens doors to faster chip design turnaround times and reduces chip design costs, both of which are critical in today’s chip design companies.This I-Corps project is based on the development of technology addressing the bottlenecks in computer chip design turnaround time. The demand for semiconductor chips or integrated circuits has increased significantly over the years due to their use in applications such as wireless communication, smart cities, and smarter cars. These integrated circuits are composed of digital and analog blocks. While the implementation of digital blocks is automated and takes comparatively less effort, analog block implementation is still a manual task that takes months in the industry. This technology is an electronic design automation software that aims to reduce the time and effort required in analog integrated circuits block implementation. The software targets the physical implementation or layout design phase of production where the designed circuit is placed and routed with physical wires as it would be on the silicon chip. This technology automatically generates analog layouts using conventional techniques as well as machine learning.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

这个I-Corps项目更广泛的影响/商业潜力是开发最先进的混合信号半导体芯片或集成电路技术。应用范围从无线和有线通信到无人驾驶汽车、智能城市和生物医学设备。与手动/人工设计时间相比，该软件能够将布局设计时间缩短90倍，同时确保输出质量相当。 设计过程的变化对于模拟集成电路市场跟上芯片和新应用的需求至关重要。该技术可以提供比当前流程更快的速度，同时减少用户输入和工作量。该软件还为更快的芯片设计周转时间和降低芯片设计成本打开了大门，这两个方面对当今的芯片设计公司都至关重要。I-Corps的这个项目是基于解决计算机芯片设计周转时间瓶颈的技术开发。由于半导体芯片或集成电路在无线通信、智能城市和智能汽车等应用中的使用，多年来对它们的需求显著增加。这些集成电路由数字和模拟模块组成。虽然数字模块的实现是自动化的，并且相对来说需要较少的工作量，但模拟模块的实现仍然是一项手动任务，在行业中需要数月的时间。该技术是一种电子设计自动化软件，旨在减少模拟集成电路块实现所需的时间和精力。该软件的目标是生产的物理实现或布局设计阶段，其中设计的电路与硅芯片上的物理线一起放置和布线。该技术使用传统技术和机器学习自动生成模拟布局。该奖项反映了NSF的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。