Free-standing III/V nanowires will be grown by the VLS growth mode as a post-CMOS process on a (100) Silicon substrate. The wires form an electronic and electro-luminescent device
Free-standing III/V nanowires will be grown by the VLS growth mode as a post-CMOS process on a (100) Silicon substrate. The wires form an electronic and electro-luminescent device
批准号:
26108951
负责人:
Dr.-Ing. Werner Prost
金额:
$0.0万
依托单位国家:
德国
项目类别:
Priority Programmes
财政年份:
2006
资助国家:
德国
项目状态:
已结题
起止时间:
2005-12-31 至 2010-12-31
中文摘要
独立纳米线的生长为制造高度不匹配的外延异质结构开辟了另一种方法。在纳米尺度上,三维结构的生长绕过了应变赝晶层的临界厚度,使得晶格沿生长方向的连续修饰成为可能。在本论文中,我们将利用金属-有机气相外延技术生长高度失配调制掺杂的III/V外延线。目标是开发基于(100)硅衬底的电子/光电器件的基本工艺技术。作为演示,应制作光纤波长范围为1.3¿m和1.55¿m的电发光器件。在衬底的温度预算和晶体取向方面,该工艺应与后cmos技术兼容。该方法是气液(VLS)生长模式。种子元素的集合是通过退火过程产生的,该过程将薄金属薄膜转移到纳米级液滴中形成纳米级模板。在单个模板内生长的纳米线集成用于制造该设备。采用dur亚胺技术形成器件隔离和电触点。模板的尺寸和位置以及器件面积由光学光刻确定。通过这种方式,将III/V纳米线器件单片集成到CMOS电路中变得可行。
英文摘要
The growth of free-standing nanowires opens-up an alternative approach for the fabrication of highly mismatched epitaxial heterostructures. The critical thickness of strained pseudomorphic layers is circumvented by the growth of three-dimensional structures at the nanoscale, where a continuous modification of the lattice along the growth direction becomes feasible. In this contribution, highly mismatched modulation-doped III/V epitaxial wires will be grown by Metal-Organic Vapour-Phase Epitaxy. The objective is the development of a basic process technology for electronic/optoelectronic devices on (100) Silicon substrates. As a demonstrator an electro luminescent devices in the wavelength range of the optical fibre at 1.3 ¿m and 1.55 ¿m shall be fabricated. The process shall be compatible to the post-CMOS technology in terms of temperature budget and crystal orientation of the substrate. The approach is the vapour-liquid (VLS) growth mode. An ensemble of seed elements is produced by an annealing process, which transfers a thin metal film into nanoscaled droplets forming a nanoscaled template. The ensemble of nanowire grown within a single template is used to fabricate the device. A durimide technology is adopted to form device isolation and electrical contacts. The size and the location of the template and hence the device area are defined by optical lithography. This way a monolithically integration of the III/V nanowire devices into a CMOS circuit becomes feasible.
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会议论文
Electrically pumped III/V nanowire light emitters
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批准号:213631903
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项目类别:Research Units
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资助金额:$0.0万
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财政年份:2012
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负责人:Dr.-Ing. Werner Prost
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依托单位:
Nanowire/CMOS Heterogeneous Integration for Next-Generation Communication Systems
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批准号:95174518
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项目类别:Research Grants
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资助金额:$0.0万
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财政年份:2008
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负责人:Dr.-Ing. Werner Prost
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依托单位:
Untersuchungen der spontanen Selbstordnung von InGaAs(P) auf InP im Hinblick auf Bauelementanwendungen
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批准号:5196720
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项目类别:Research Grants
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资助金额:$0.0万
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财政年份:1999
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负责人:Dr.-Ing. Werner Prost
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依托单位:
海外基金