Free-standing III/V nanowires will be grown by the VLS growth mode as a post-CMOS process on a (100) Silicon substrate. The wires form an electronic and electro-luminescent device
Free-standing III/V nanowires will be grown by the VLS growth mode as a post-CMOS process on a (100) Silicon substrate. The wires form an electronic and electro-luminescent device
批准号:
26108951
负责人:
Dr.-Ing. Werner Prost
金额:
$0.0万
依托单位国家:
德国
项目类别:
Priority Programmes
财政年份:
2006
资助国家:
德国
项目状态:
已结题
起止时间:
2005-12-31 至 2010-12-31
中文摘要
自支撑纳米线的生长为制备高度失配的外延异质结构开辟了一条新的途径。在纳米尺度上,三维结构的生长绕过了应变伪晶层的临界厚度,在这种情况下,沿生长方向连续修改晶格成为可能。在这项贡献中,高度失配的调制掺杂III/V外延线将通过金属-有机气相外延生长。目标是在(100)硅衬底上开发电子/光电子器件的基本工艺技术。作为演示,应制作1.3?m和1.55?m光纤波长范围内的电致发光器件。在温度预算和衬底的晶体取向方面,该工艺应与后CMOS型工艺兼容。方法是汽液(VLS)生长模式。种子元素的集合是通过退火过程产生的,该过程将薄的金属薄膜转化为纳米尺度的液滴,形成纳米尺度的模板。在单个模板内生长的纳米线集合被用于制造该器件。采用硬质亚胺技术形成器件隔离和电接触。模板的大小和位置以及器件区域由光学光刻来限定。通过这种方式,可以将III/V纳米线器件单片集成到cmos电路中。
英文摘要
The growth of free-standing nanowires opens-up an alternative approach for the fabrication of highly mismatched epitaxial heterostructures. The critical thickness of strained pseudomorphic layers is circumvented by the growth of three-dimensional structures at the nanoscale, where a continuous modification of the lattice along the growth direction becomes feasible. In this contribution, highly mismatched modulation-doped III/V epitaxial wires will be grown by Metal-Organic Vapour-Phase Epitaxy. The objective is the development of a basic process technology for electronic/optoelectronic devices on (100) Silicon substrates. As a demonstrator an electro luminescent devices in the wavelength range of the optical fibre at 1.3 ¿m and 1.55 ¿m shall be fabricated. The process shall be compatible to the post-CMOS technology in terms of temperature budget and crystal orientation of the substrate. The approach is the vapour-liquid (VLS) growth mode. An ensemble of seed elements is produced by an annealing process, which transfers a thin metal film into nanoscaled droplets forming a nanoscaled template. The ensemble of nanowire grown within a single template is used to fabricate the device. A durimide technology is adopted to form device isolation and electrical contacts. The size and the location of the template and hence the device area are defined by optical lithography. This way a monolithically integration of the III/V nanowire devices into a CMOS circuit becomes feasible.
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会议论文
Electrically pumped III/V nanowire light emitters
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批准号:213631903
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项目类别:Research Units
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资助金额:$0.0万
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财政年份:2012
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负责人:Dr.-Ing. Werner Prost
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依托单位:
Nanowire/CMOS Heterogeneous Integration for Next-Generation Communication Systems
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批准号:95174518
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项目类别:Research Grants
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资助金额:$0.0万
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财政年份:2008
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负责人:Dr.-Ing. Werner Prost
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依托单位:
Untersuchungen der spontanen Selbstordnung von InGaAs(P) auf InP im Hinblick auf Bauelementanwendungen
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批准号:5196720
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项目类别:Research Grants
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资助金额:$0.0万
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财政年份:1999
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负责人:Dr.-Ing. Werner Prost
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依托单位:
海外基金