Development of a Fast Signal/Power Integrity Analysis Simulator for 3-Dimensional Integrated Circuits with Processing in Memory (PIM)

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Under this project, the PI was able to conduct a novel research and publish various journals and conferences (all reviewed).Using this budget, the PI developed a novel statistical/analytical simulator for an advanced packages with a new architecture (PIM). The proposed simulator/analyzer allows an accurate SI/PI/EMI/EMC/HWS analysis.Using the simulator, noise suppression structures and high-speed channels are designed in the interposer supporting the PIM-HBM. Also, low-loss substrate is adopted in the package. Under this condition, the design and analysis must be conducted once again. The proposed simulator provides a promising solution under this case since it enables an ultra-fast SI/PI analysis. The result is presented at the international conference as an invited paper. This result is also highlighted in the IEEE advanced packaging society. This new method is also delivered at IC design education center (IDEC Korea)'s package design and analysis lecture as well. Also, the design/simulation method is expanded to other electrical system/package/interconnection analysis. The result is presented at DesignCon which is a top industry-oriented conference held in Silicon valley and won the best paper award.