Research on Self-Checking VLSI Processors
Research on Self-Checking VLSI Processors
批准号:
60460132
负责人:
YONEDA Tomohiro
金额:
$4.61万
依托单位国家:
日本
项目类别:
Grant-in-Aid for General Scientific Research (B)
财政年份:
1985
资助国家:
日本
项目状态:
已结题
起止时间:
1985 至 1986
中文摘要
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英文摘要
A concept of the error secure and the error propagating interfaces of the subsystems in a digital system is introduced, and shown to be useful for practical design and verification for a strongly fault-secure system which is known to achieve the TSC goal. A sufficient condition is shown for subsystem interfaces to meet in order for it to be possible to construct a strongly fault-secure system with no checkers used to monitor the embedded interfaces. Based on the error secure/propagating concept, a design is presented for the strongly fault secure microprocessor which implements the instruction set of Intel's i8080 8-bit microprocessor. In the design, a complete set of building blocks is defined and all the partial interfaces are verified for the error secure/propagating property. Only four checkers are used at the embedded interfaces in the resulting strongly fault-secure processor.
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河村俊明: 昭和60年度電子通信学会総合全国大会. 7. 61 (1985)
川村俊明:1985 年 IEICE 大会。7. 61 (1985)
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南谷崇: 電子通信学会技術研究報告. 85. 7-12 (1985)
南宫隆:IEICE 技术研究报告。85. 7-12 (1985)
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南谷 崇: 電子通信学会論文誌(D). J68-D. 2015-2026 (1985)
Takashi Minamiya:电子与通信工程师学会期刊(D)2015-2026(1985)。
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T.Yoneda: "The container concept for relay packets in fault-tolerant computer networks" Proc.FTCS-16. 190-195 (1986)
T.Yoneda:“容错计算机网络中中继数据包的容器概念”Proc.FTCS-16。
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南谷 崇: IEEE Trans.on Computers. 1. 1121-1123 (1987)
南谷隆:IEEE Trans.on 计算机。1. 1121-1123 (1987)
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共 18 条
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负责人:YONEDA Tomohiro
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