Research on Hardware Design of a Language Processing System Interactive Pogramming

为了有效地支持高级语言编程，显然必须将语言系统组织为一个精心设计的工具集，尽管工具的执行速度不容忽视。当使用解释器等低速工具时，这一点尤为重要。这种情况可以很容易地通过使用硬件技术来改变，硬件技术在过去十年中得到了极大的发展。相当复杂的算法可以很容易地在单个芯片上实现。本研究旨在寻求将基于软件的算法转化为硬件算法的系统方法。然而，当预期会有极大的效率时；通常头脑简单的方法没有那么有效；例如，软件算法的微程序实现可以获得10倍的性能；然而，当找到面向硬件的方法时，有时我们可以获得100倍以上的性能。在我们的项目中，使用一个硅编译器来设计一个LSI芯片并评估其性能。作为应用程序，我们使用了两种语言解释器：PL/0和Prolog，并为它们设计了原型芯片。得到了语言系统VLSI实现的一些宝贵经验和设计措施，并为更实际的实际芯片设计做了准备。

In order to support high-level language programming effectively, obviously the language system must be organized as an elaborate tool set, although the exeution speed of the tool cannot be ignored. This is especially important when a low speed tool such as interpreter is used. This situation can be easily changed by the use of hardware technology which has been drastically developed for the past decade. Rather complex algorithm can be easily implemented in a single chip. This research is targeted to seek for systematic approaches to transform software based algorithms into hardwared one. When drastic efficiency should be expected, however ; usual simple minded approach is not so effective ; for example, a microprogram implementation of software algorithm may obtain 10 times performance ; however, when a hardware oriented approach is found, sometimes we obtain more than 100 times performance. In our project, a sillicon compiler is used to design a LSI chip and evaluate its perfoemance. As applications we used two language interpreters : PL/0 and Prolog, and made prototype chip designs for these. As a result, we got several valuable experiences and design measures of VLSI realization of language system, and preparation of more actual design of real chips.