Studies on Logic Design Methods Adaptable to CAD DB

由于逻辑电路变得具有大型和复杂的结构，因此设计数据的重用和逻辑电路的设计自动化变得重要。虽然CAD数据库是实现设计数据重用不可缺少的技术，但现有的设计方法和数据库技术很难集成。为此，我们研究并改进了适合数据库的逻辑电路设计方法，实现了CAD数据库。该研究的主题包括转换方法的改进、FPGA逻辑电路设计方法的开发、逻辑电路重用技术的开发以及逻辑电路功耗节省技术的开发。我们开发了SSPF（允许函数的超集），扩展CSPF（兼容的允许函数集）的转换方法，并增加了自由度的转换逻辑电路。我们还提出了PSPFD（基于优先级的SPFD）， ...更多信息 推广了SPFD代表FPGA电路逻辑自由度的概念，实现了电路面积减少40%。我们提出了一种新的逻辑电路设计的算法，节省功耗，使用三态CMOS，并实现了功能分配考虑节省功耗。在1999年，我们开发了两种方法：一种将模拟退火（metabolistics之一）应用于所述转换方法的方法，提出了基于PF概念的逻辑优化方法（允许功能）在2000年，首先，我们改进了传输晶体管逻辑电路的优化方法。我们在35年前出版的一本逻辑电路书中发现了错误，这本书收集了用改进的方法手工计算的最小电路。其次，CMOS逻辑优化方法的发展取得了进展。我们已经将该方法应用于前一年开发的用于减少逻辑门中晶体管数量的传输晶体管逻辑。我们还介绍和应用了换能方法来减少逻辑门的数量。将CMOS逻辑优化方法与换能法相结合，发展了一种更为有效的逻辑电路优化方法。少

Reuse of design data and design automation of logic circuits becomes important because logic circuits become to have large and complex structure. Though the CAD database is an indispensable technology to realize reuse of design data, it is difficult to integrate existing design methods and database technology as it is. Thus we have studied and improved design methods of logic circuits suitable for databases, which realize the CAD database. The themes of this research includes an improvement of the transduction method, development of a method for FPGA logic circuit design, development of a reuse technique of logic circuits, and development of a technique for saving power consumption of logic circuits.In 1998, we have developed SSPFs (Super Set of Permissible Functions) that extend CSPFs (Compatible Sets of Permissible Functions) used by the transduction method and increased the degree of freedom in transformation of logic circuits. We also have proposed PSPFDs (Priority based SPFDs) tha … More t generalize the notion of SPFDs representing the logical degree of freedom of FPGA circuits and achieved a 40% reduction in the area of circuits. We have proposed a new algorithm for logic circuit design with saving power consumption that uses 3-state CMOS and realized the function assignment considering saving power consumption.In 1999, we have developed two methods : a method that applies simulated annealing, one of metaheuristics, to the transduction method, and a method of logic optimization based on the notion of PF (Permissible Function) used by the transduction method for a pass transistor logic that is expected to realize more low power consumption circuits than existing CMOS logic.In 2000, first, we have improved the optimization method for pass transistor logic circuits. we have found errors in a book of logic circuits, published more than 35 years ago, that collects minimal circuits calculated by hand by the improved method. Secondly, the development of a optimization method of CMOS logic have progressed. We have applied the method to the pass transistor logic that developed the preceding year for decreasing the number of transistors in logic gates. We also have introduced and applied the transduction method to reduce the number of logic gates. More effective optimization method of logic circuits have been developed by integrating the CMOS logic optimization method and the transduction method. Less