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Studies on Logic Design Methods Adaptable to CAD DB

Studies on Logic Design Methods Adaptable to CAD DB
适应CAD DB的逻辑设计方法研究
批准号:
10480060
负责人:
KAMBAYASHI Yahiko
金额:
$7.42万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for Scientific Research (B).
财政年份:
1998
资助国家:
日本
项目状态:
已结题
起止时间:
1998 至 2000

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中文摘要
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英文摘要
Reuse of design data and design automation of logic circuits becomes important because logic circuits become to have large and complex structure. Though the CAD database is an indispensable technology to realize reuse of design data, it is difficult to integrate existing design methods and database technology as it is. Thus we have studied and improved design methods of logic circuits suitable for databases, which realize the CAD database. The themes of this research includes an improvement of the transduction method, development of a method for FPGA logic circuit design, development of a reuse technique of logic circuits, and development of a technique for saving power consumption of logic circuits.In 1998, we have developed SSPFs (Super Set of Permissible Functions) that extend CSPFs (Compatible Sets of Permissible Functions) used by the transduction method and increased the degree of freedom in transformation of logic circuits. We also have proposed PSPFDs (Priority based SPFDs) tha … More t generalize the notion of SPFDs representing the logical degree of freedom of FPGA circuits and achieved a 40% reduction in the area of circuits. We have proposed a new algorithm for logic circuit design with saving power consumption that uses 3-state CMOS and realized the function assignment considering saving power consumption.In 1999, we have developed two methods : a method that applies simulated annealing, one of metaheuristics, to the transduction method, and a method of logic optimization based on the notion of PF (Permissible Function) used by the transduction method for a pass transistor logic that is expected to realize more low power consumption circuits than existing CMOS logic.In 2000, first, we have improved the optimization method for pass transistor logic circuits. we have found errors in a book of logic circuits, published more than 35 years ago, that collects minimal circuits calculated by hand by the improved method. Secondly, the development of a optimization method of CMOS logic have progressed. We have applied the method to the pass transistor logic that developed the preceding year for decreasing the number of transistors in logic gates. We also have introduced and applied the transduction method to reduce the number of logic gates. More effective optimization method of logic circuits have been developed by integrating the CMOS logic optimization method and the transduction method. Less
期刊论文(45)
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Takenori Kouda: "Reduction of the Number of FPGA Blocks by Maximizing Flexibility of Internal Functions"IEICE Trans,Special Section on VLSI Design and CAD Algorithm. 2554-2562 (1998)
Takenori Kouda:“通过最大限度地提高内部功能的灵活性来减少 FPGA 块的数量”IEICE Trans,VLSI 设计和 CAD 算法的特别部分。
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通讯作者:
Takenori Kouda: "Reduction of the Number of FPGA Blocks by Maximizing Flexibility of Intrenal Functions" IEICE Trans, Special Section on VLSI Design and CAD Algorithm. 2554-2562 (1998)
Takenori Kouda:“通过最大化内部功能的灵活性来减少 FPGA 模块的数量”IEICE Trans,VLSI 设计和 CAD 算法的特别章节。
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K.Cheng: "Advanced Replacement Policies for WWW Caching"Proc.1st International Conference on Web Age Information Management (WAIM'2000). LNCS1846. 239-244 (2000)
K.Cheng:“WWW 缓存的高级替换策略”Proc.第一届网络时代信息管理国际会议 (WAIM2000)。
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Y.Zhang: "On Interactions between Coexisting Traditional and Cooperative Transactions"International Journal of Cooperative Information Systems. Vol.8. 87-109 (1999)
Y.Zhang:“论共存的传统交易与合作交易之间的相互作用”国际合作信息系统杂志。
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16
    Studies on Design and Development of Web Data Warehouse
    • 批准号:
      13480103
    • 项目类别:
      Grant-in-Aid for Scientific Research (B)
    • 资助金额:
      $10.3万
    • 财政年份:
      2001
    • 负责人:
      KAMBAYASHI Yahiko
    • 依托单位:
    Studies on Internet Database and its Applications
    • 批准号:
      12792015
    • 项目类别:
      Grant-in-Aid for University and Society Collaboration
    • 资助金额:
      $26.24万
    • 财政年份:
      2000
    • 负责人:
      KAMBAYASHI Yahiko
    • 依托单位:
    Studies on Cooperative Information Systems
    • 批准号:
      10044154
    • 项目类别:
      Grant-in-Aid for Scientific Research (B).
    • 资助金额:
      $5.18万
    • 财政年份:
      1998
    • 负责人:
      KAMBAYASHI Yahiko
    • 依托单位:
    Studies on Wide-Area Distributed Coordination Mechanisms
    • 批准号:
      07044143
    • 项目类别:
      Grant-in-Aid for international Scientific Research
    • 资助金额:
      $5.76万
    • 财政年份:
      1995
    • 负责人:
      KAMBAYASHI Yahiko
    • 依托单位:
    海外基金