A super parallel vision system implemented with mixed analog and digital circuits

模拟与数字混合电路实现的超级并行视觉系统

基本信息

批准号：
14350188
负责人：
YAGI Tetsuya
金额：
$ 8.7万
依托单位：
Osaka University
依托单位国家：
日本
项目类别：
Grant-in-Aid for Scientific Research (B)
财政年份：
2002
资助国家：
日本
起止时间：
2002 至 2003
项目状态：
已结题

来源：
https://kaken.nii.ac.jp/en/grant/KAKENHI-PROJECT-14350188/
关键词：
retina image processing analog VLS real time processing robot vision parallel vision FPGA multi-media シリコン網膜実時間静止画像動画像運動方向検出奥行き検出

项目摘要

The purpose of the present research is to develop a novel vision system that can carry out the real-time image processing with mixed analog/digital architecture. Accordingly, we have designed and fabricated the system consisting of a silicon retina, an analog Very Large Scale Integrated (VLSI) circuit and Field Programmable Gate Array. (FPGA). The silicon retina emulates the sustained and the transient responses found in the vertebrate retina. The output emulating sustained response possesses a Palladian-Gaussian-like receptive field and therefore carries out a smoothing and contrast-enhancement on input images. The output emulating the transient response was obtained by subtracting consecutive images that were smoothed out by the resistive network. The outputs of these two channels can be obtained alternately from the silicon retina in real time, within time delays not exceeding a few tens of ms, in indoor illumination. The outputs of the chip are offset-suppressed analog voltages since uncontrollable mismatches of transistor characteristics are compensated for with the aid of sample/hold circuits embedded in each pixel circuit. The analog outputs from the silicon retina representing the preprocessed image with these channels are transferred to the FPGA through a A/D converter. The FPGA carries out digital image computations such as edge detection, target tracking and depth perception. The parallel vision system developed in the present study is readily used in a variety of engineering applications such as the fields of robot vision and multi-media.

本研究的目的是开发一种新颖的视觉系统，该系统可以通过混合模拟/数字体系结构进行实时图像处理。因此，我们设计和制造了由硅视网膜组成的系统，一个类似物非常大的集成（VLSI）电路和现场可编程门阵列。（FPGA）。硅视网膜模仿脊椎动物视网膜中发现的持续和瞬态反应。输出模拟持续响应具有帕拉迪式高斯的感受场，因此在输入图像上进行了平滑和对比度增强。通过减去电阻网络平滑的连续图像获得模拟瞬态响应的输出。在室内照明中，这两个通道的输出可以实时从硅视网膜实时获得，在时间延迟内不超过几十ms。芯片的输出是抵消抑制的模拟电压，因为晶体管特性的不可控制的不匹配是借助嵌入每个像素电路中的样品/保持电路的帮助。来自代表这些通道预处理图像的硅视网膜的模拟输出通过A/D转换器传输到FPGA。 FPGA执行数字图像计算，例如边缘检测，目标跟踪和深度感知。本研究中开发的并行视觉系统很容易用于各种工程应用中，例如机器人视觉和多媒体领域。