Image Feature Extraction LSIs and its application to Natural Image Recognition Systems

图像特征提取LSI及其在自然图像识别系统中的应用

• 批准号: 12044211
• 负责人: IWATA Atsushi
• 金额: $ 39.68万
• 依托单位: Hiroshima University
• 依托单位国家: 日本
• 项目类别: Grant-in-Aid for Scientific Research on Priority Areas
• 财政年份: 2000
• 资助国家: 日本
• 起止时间: 2000 至 2002
• 项目状态: 已结题
• 来源: https://kaken.nii.ac.jp/en/grant/KAKENHI-PROJECT-12044211/
• 关键词: pulse modulation; merged AD circuit architecture; resistive-fuse network; cellular automaton; Gabor filter; coarse region segmentation; extraction; face; object recognition; FPGA implementation; 領域分割; 特徴抽出; ガボールウェーブレット変換; 画素並列; アナログ・デジタル融合LS

The aim of this research is to develop integrated systems for face/object recognition from natural scene images. The systems execute image feature extraction with real time by pixel-parallel operation based on the merged AD circuit architecture using pulse-modulation signals. As algorithms and architectures for recognition processing, we have developed coarse region segmentation by resistive-fuse networks, region extraction by cellular automaton processing and feature extraction by Gabor wavelet transformation.We have verified the flexible segmentation ability of the method using resistive-fuse networks, and have design, fabricated and verified a VLSI chip of the network. We have also developed efficient FPGA implementation of the resistive-fuse networks, in which the processing time is about 20 ms for 64×64-pixel images. As for region extraction, FPGA implementation of the cellular automaton has achieved processing time of 5 micro seconds for 30×30-pixel images including about 5 regions, which is several tens times faster than the conventional serial labeling processing. We have also proposed a resistive network circuit for Gabor filtering, and designed a 2-D Gabor filtering LSI of 4.9 mm sq. with 12×24 pixels using a 0.35 micron CMOS process. A 2-D impulse response has been obtained by the measurement of the fabricated LSI chip. We have also designed a 2-D Gabor filtering LSI of 9.8 mm sq. with 6l×72 pixels in which operation time of 40 ms and power consumption of 800 mW have been obtained.

本研究的目的是开发集成系统，从自然场景图像的人脸/物体识别。该系统采用脉冲调制信号，基于合并AD电路结构，通过像素并行运算实现真实的实时图像特征提取。作为识别处理的算法和结构，我们发展了基于连续融合网络的粗区域分割、基于元胞自动机的区域提取和基于Gabor小波变换的特征提取，并利用连续融合网络验证了该方法的灵活分割能力，设计、制作和验证了该网络的VLSI芯片。我们还开发了有效的FPGA实现的连续融合网络，其中的处理时间约为20 ms的64×64像素的图像。在区域提取方面，FPGA实现的元胞自动机对包含5个区域的30×30像素图像的处理时间为5微秒，比传统的串行标记处理快几十倍。提出了一种用于Gabor滤波的电阻网络电路，并设计了一个4.9mm2的二维Gabor滤波大规模集成电路。12×24像素，采用0.35微米CMOS工艺。一个2-D脉冲响应已获得的制造的LSI芯片的测量。我们还设计了一个9.8mm2的二维Gabor滤波器LSI。在61 ×72象素的情况下，获得了40 ms的工作时间和800 mW的功耗。

项目成果

T.Morie et al.: "A 1-D CMOS PWM Cellular Neural Network Circuit and Resistive-Fuse Network Operation"Extended Abstracts of the 2001 Int. Conf. Solid State Devices and Materials. SSDM2001. 90-91 (2001)

T.Morie 等人：“一维 CMOS PWM 细胞神经网络电路和电阻熔丝网络操作”2001 年 Int. 的扩展摘要。

H.Ando, T.Morie, M.Miyake, M.Nagata, A.Iwata: "Image Segmentation/Extraction Using Nonlinear Cellular Networks and their VLSI Implementation Using Pulse-Modulation Techniques."IEICE Trans. Fundamentals. Vol.E85-A, No.2. 381-388 (2002)

H.Ando、T.Morie、M.Miyake、M.Nagata、A.Iwata：“使用非线性蜂窝网络进行图像分割/提取以及使用脉冲调制技术的 VLSI 实现。”IEICE Trans。

H.And, T.Morie, M.Nagata, A.Iwata: "An Image Region Extraction LSI Based on Merged/Mixed-Signal Nonlinear Oscillator Network Circuit."28th European Solid-State Circuits Coference (ESSCIRC 2002). 703-706 (2002)

H.And、T.Morie、M.Nagata、A.Iwata：“基于合并/混合信号非线性振荡器网络电路的图像区域提取 LSI”。第 28 届欧洲固态电路会议 (ESSCIRC 2002)。

梅澤淳, 森江隆, 永田真, 岩田穆: "セルラーニューラルネットワーク方式ガボール型フィルタ回路の簡略化ダイナミクスの提案"電子情報通信学会総合大会. A-1. 22 (2002)

Jun Umezawa、Takashi Morie、Makoto Nagata、Mu Iwata：“细胞神经网络 Gabor 型滤波器电路的简化动力学提案”IEICE 大会 A-1。

A.Iwata, T.Morie, M.Nagata: "Merged Analog-digital Circuits using Pulse Modulation for intelligent SoC Applications(Invited)"IEICE Trans. Fundamentals. Vol.E84-A No.2. 486-496 (2001)

A.Iwata、T.Morie、M.Nagata：“使用脉冲调制实现智能 SoC 应用的合并模拟数字电路（特邀）”IEICE Trans。