Image Feature Extraction LSIs and its application to Natural Image Recognition Systems

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The aim of this research is to develop integrated systems for face/object recognition from natural scene images. The systems execute image feature extraction with real time by pixel-parallel operation based on the merged AD circuit architecture using pulse-modulation signals. As algorithms and architectures for recognition processing, we have developed coarse region segmentation by resistive-fuse networks, region extraction by cellular automaton processing and feature extraction by Gabor wavelet transformation.We have verified the flexible segmentation ability of the method using resistive-fuse networks, and have design, fabricated and verified a VLSI chip of the network. We have also developed efficient FPGA implementation of the resistive-fuse networks, in which the processing time is about 20 ms for 64×64-pixel images. As for region extraction, FPGA implementation of the cellular automaton has achieved processing time of 5 micro seconds for 30×30-pixel images including about 5 regions, which is several tens times faster than the conventional serial labeling processing. We have also proposed a resistive network circuit for Gabor filtering, and designed a 2-D Gabor filtering LSI of 4.9 mm sq. with 12×24 pixels using a 0.35 micron CMOS process. A 2-D impulse response has been obtained by the measurement of the fabricated LSI chip. We have also designed a 2-D Gabor filtering LSI of 9.8 mm sq. with 6l×72 pixels in which operation time of 40 ms and power consumption of 800 mW have been obtained.