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A 3 Dimensional Integration Scheme Utilizing Wireless Interconnections for Implementing Hyper Brains

利用无线互连实现超级大脑的 3 维集成方案

基本信息

批准号：
15106007
负责人：
IWATA Atsushi
金额：
$ 71.64万
依托单位：
Hiroshima University
依托单位国家：
日本
项目类别：
Grant-in-Aid for Scientific Research (S)
财政年份：
2003
资助国家：
日本
起止时间：
2003 至 2007
项目状态：
已结题

项目摘要

Research Objectives:3D integration technologies using wireless interconnections and object recognition systems Research achievements:(1). Chip-to-chip wireless interconnection and 3D integration deviceschip-to-chip wireless interconnection using electromagnetic induction between coupled inductors was proposed, and test circuits were designed and fabricated. Bit rate of 1Gb/s was achieved with 1mW power dissipation; Bit rate of 2.4Gb/s was achieved with high speed design.Three dimensional integration technology utilizing wireless interconnection using on-chip antenna and inductor coupled interconnection, named 3DCSS was proposed. Basic scheme and prototype systems were designed and fabricated. High performance image processing was realized with 3DCSS.Standing wave oscillator using inductor termination and coupling was proposed and a test chip was designed and fabricated with an 0.18um CMOS technology. 10GHz high quality oscillation signal with low phase noise was obtained.MOS device mod … More el (HiSIM) using surface potential was proposed, and highly accurate description capability with small number of parameters was effective for larger than 10GHz frequency range RF circuit applications.(2) Highly cognitive systems using chip-to-chip wireless interconnectionAn associative memory using analog and digital combined circuit techniques was developed, and highly speed operation with low power dissipation were confirmed. Highly functional, high performance pattern matching which was essential for detection, tracking and recognition of objects in image signals was implemented utilizing the associative memories.3D prototype system integrating three kinds of image processing chips was implemented, and expected data transfer speed was obtained. Low voltage operated low noise amplifier and high performance VCO were also developed for basic circuit blocks.(3) Processing algorithm for implementing brain functions and systemsLearning algorithm based on a human brain was implemented in an associative memory. By using the algorithm, a memory based learning model was proposed and its effectiveness for image recognition was confirmed. Less

研究目标：利用无线互连和物体识别系统的3D集成技术研究成果：(1)．芯片间无线互连和3D集成器件提出了利用耦合电感之间的电磁感应进行芯片间无线互连，并设计和制作了测试电路。 1Gb/s 的比特率是在 1mW 功耗下实现的；通过高速设计实现了2.4Gb/s的比特率。提出了利用片上天线和电感耦合互连的无线互连的三维集成技术，称为3DCSS。设计并制造了基本方案和原型系统。利用3DCSS实现了高性能图像处理。提出了采用电感端接和耦合的驻波振荡器，并采用0.18um CMOS技术设计并制作了测试芯片。获得了低相位噪声的10GHz高质量振荡信号。提出了使用表面电势的MOS器件模型（HiSIM），并且以少量参数实现了高精度描述能力，对于大于10GHz频率范围的射频电路应用是有效的。（2）使用芯片到芯片无线互连的高度认知系统开发了使用模拟和数字组合电路技术的关联存储器，并实现了低功耗的高速运行。确认的。利用联想存储器实现了图像信号中目标检测、跟踪和识别所必需的高功能、高性能模式匹配。实现了集成三种图像处理芯片的3D原型系统，并获得了预期的数据传输速度。还开发了低压操作低噪声放大器和高性能VCO作为基本电路块。(3)实现大脑功能和系统的处理算法在联想存储器中实现了基于人脑的学习算法。通过使用该算法，提出了一种基于记忆的学习模型，并证实了其对于图像识别的有效性。较少的