A 3 Dimensional Integration Scheme Utilizing Wireless Interconnections for Implementing Hyper Brains
A 3 Dimensional Integration Scheme Utilizing Wireless Interconnections for Implementing Hyper Brains
批准号:
15106007
负责人:
IWATA Atsushi
金额:
$71.64万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for Scientific Research (S)
财政年份:
2003
资助国家:
日本
项目状态:
已结题
起止时间:
2003 至 2007
中文摘要
研究目标:利用无线互联和目标识别系统的三维集成技术研究成果:(1)。提出了利用耦合电感之间的电磁感应实现片间无线互连和三维集成器件,并设计和制作了测试电路。以1mW的功耗实现1Gb/s的比特率;采用高速设计实现了2.4Gb/s的比特率。提出了利用片上天线与电感耦合互联的无线互联三维集成技术3DCSS。设计并制作了基本方案和原型系统。采用3DCSS实现了高性能图像处理。提出了采用电感端接耦合的驻波振荡器,并采用0.18um CMOS工艺设计制作了测试芯片。获得了低相位噪声的10GHz高质量振荡信号。提出了基于表面电位的MOS器件模型(HiSIM),在大于10GHz频率范围的射频电路应用中,具有较少参数的高精度描述能力。(2)采用芯片间无线互联的高认知系统。开发了一种采用模拟和数字组合电路技术的联想存储器,实现了低功耗的高速运行。利用联想记忆实现了对图像信号中目标的检测、跟踪和识别所必需的高功能、高性能的模式匹配。实现了集成三种图像处理芯片的三维原型系统,达到了预期的数据传输速度。在基本电路模块上还开发了低压低噪声放大器和高性能压控振荡器。(3)实现脑功能和系统的处理算法基于人脑的学习算法在联想记忆中实现。利用该算法,提出了一种基于记忆的学习模型,并验证了该模型在图像识别中的有效性。少
英文摘要
Research Objectives:3D integration technologies using wireless interconnections and object recognition systems Research achievements:(1). Chip-to-chip wireless interconnection and 3D integration deviceschip-to-chip wireless interconnection using electromagnetic induction between coupled inductors was proposed, and test circuits were designed and fabricated. Bit rate of 1Gb/s was achieved with 1mW power dissipation; Bit rate of 2.4Gb/s was achieved with high speed design.Three dimensional integration technology utilizing wireless interconnection using on-chip antenna and inductor coupled interconnection, named 3DCSS was proposed. Basic scheme and prototype systems were designed and fabricated. High performance image processing was realized with 3DCSS.Standing wave oscillator using inductor termination and coupling was proposed and a test chip was designed and fabricated with an 0.18um CMOS technology. 10GHz high quality oscillation signal with low phase noise was obtained.MOS device mod … More el (HiSIM) using surface potential was proposed, and highly accurate description capability with small number of parameters was effective for larger than 10GHz frequency range RF circuit applications.(2) Highly cognitive systems using chip-to-chip wireless interconnectionAn associative memory using analog and digital combined circuit techniques was developed, and highly speed operation with low power dissipation were confirmed. Highly functional, high performance pattern matching which was essential for detection, tracking and recognition of objects in image signals was implemented utilizing the associative memories.3D prototype system integrating three kinds of image processing chips was implemented, and expected data transfer speed was obtained. Low voltage operated low noise amplifier and high performance VCO were also developed for basic circuit blocks.(3) Processing algorithm for implementing brain functions and systemsLearning algorithm based on a human brain was implemented in an associative memory. By using the algorithm, a memory based learning model was proposed and its effectiveness for image recognition was confirmed. Less
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神経信号観測のためのワイヤレスセンシングLSIの研究
用于神经信号观测的无线传感LSI研究
DOI:
--
发表时间:
2007
期刊:
影响因子:
--
作者:
[有田 真一, 浴 良仁, 吉田 毅, 岩田 穆, 吉田 将之, 植松 一眞]
通讯作者:
植松 一眞
12GHz Low-Area-Overhead Standing-Wave Clock Distribution with Inductively-Loaded and Coupled technique
采用电感负载和耦合技术的 12GHz 低面积开销驻波时钟分配
DOI:
--
发表时间:
2007
期刊:
IEEE International Solid-State Circuits Conference Digest of Technical Papers Vol. 50, No. 07CH37858
影响因子:
--
作者:
[M. Sasaki, Mamoru Sasaki]
通讯作者:
Mamoru Sasaki
Low-Voltage, Low-Phase-Noise Ring Voltage-Controlled Oscillator Using l/f-Noise Reduction Techniques
采用 l/f 降噪技术的低电压、低相位噪声环形压控振荡器
DOI:
--
发表时间:
2007
期刊:
Japanese Journal of Applied Physics Vol.46,No.4B
影响因子:
--
作者:
[Hiroyuki Okamoto, et al., Miyawaki K, T. Kawashima, M.Hangyo, Takeshi Yoshida]
通讯作者:
Takeshi Yoshida
A 2.7 Gcps and 7-Multiplexing CDMA Serial Communication Chip Using Two-Step Synchronization Technique
采用两步同步技术的2.7 Gcps和7复用CDMA串行通信芯片
DOI:
--
发表时间:
2005
期刊:
IEICE Trans. Electron Vol.E88-C,No.6
影响因子:
--
作者:
[N. Kano, M. Yamamua, F. Komatsu, T. Kawashima, M. Shiozaki]
通讯作者:
M. Shiozaki
A 0.95mW/1.0Gbps Spiral-Inductor Based Wireless Chip Interconnect with Asynchronous Communication Scheme
基于0.95mW/1.0Gbps螺旋电感的无线芯片互连与异步通信方案
DOI:
--
发表时间:
2005
期刊:
IEEE 2005 SYMPOSIUM ON VLSI CIRCUITS No.05CH37640
影响因子:
--
作者:
[Zhao Xiang Wang, Ting Dong, Li Xia, M.Sasaki]
通讯作者:
M.Sasaki
共 103 条
Metagenomic analysis of Parkinson's disease patients' gut microflora
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批准号:21659219
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项目类别:Grant-in-Aid for Challenging Exploratory Research
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资助金额:$2.11万
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财政年份:2009
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负责人:IWATA Atsushi
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依托单位:
Search for inhibitory factor for polyglutamine protein ubioquitylation
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批准号:18590929
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项目类别:Grant-in-Aid for Scientific Research (C)
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资助金额:$2.34万
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财政年份:2006
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负责人:IWATA Atsushi
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依托单位:
Image Feature Extraction LSIs and its application to Natural Image Recognition Systems
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批准号:12044211
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项目类别:Grant-in-Aid for Scientific Research on Priority Areas
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资助金额:$39.68万
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财政年份:2000
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负责人:IWATA Atsushi
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依托单位:
Research and Development for Analog-Digital Merged Image Processing
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批准号:09555110
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$7.3万
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财政年份:1997
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负责人:IWATA Atsushi
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依托单位:
A high performance on-chip data transfer technique using pulse modulation signals
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批准号:07455151
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$4.61万
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财政年份:1995
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负责人:IWATA Atsushi
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依托单位: