Research and Development for Analog-Digital Merged Image Processing

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In order to realize pattern recognition systems which extract features from two dimensional image data, the bio-inspired system architecture and low power circuit technique are proposed. A new image processing LSI chip is developed based on the proposed techniques. Merged analog-digital circuit architecture using pulse width modulation signals realizes parallel processing with low power and small chip area. Two dimensional image sensor array which senses image data, converts them to PWM signals and calculates' global features. A test chip was designed and fabricated with a O.8um double-poly, double-metal CMOS technology. The image sensor array with 64 x 64 pixels, an addressing circuit and a signal processing circuit for focal plane signal processing, are integrated on a l5 x l5mm chip. Experimental results shows the test chip realizes the feature detections and operates at 3.3V supply with low power dissipation. This techniques are expected effectivelly applied to recognition systems for characters, objects and faces, highly flexible vision systems for robots, and sensing system for various kinds of security systems.