Autonomous Repairing Ability in Computers

计算机的自主修复能力

基本信息

  • 批准号:
    08455185
  • 负责人:
  • 金额:
    $ 2.69万
  • 依托单位:
  • 依托单位国家:
    日本
  • 项目类别:
    Grant-in-Aid for Scientific Research (B)
  • 财政年份:
    1996
  • 资助国家:
    日本
  • 起止时间:
    1996 至 无数据
  • 项目状态:
    已结题

项目摘要

Need for high robustness against hardware faults increases considerably in the future computers as the hardware sizes of them enlarge. The goal of this research is to propose the computers which have high robustness against faults happen in their run-time as well as in the fabrication process. In this research, neuro-computer is chosen as a target computer. High fault tolerance is expected in the neuro-computer because it mimics the biological neural system. However, not so many results have been repoted concerning its fault tolerance. Especially, the fault tolerance of SOM (Self-Organizing Map) which is one of the promising neuro-computer architectures has not been explored yet.The autonomous repairing ability of the SOM has been evaluated theoretically and experimentally, using the real neuro-computer. The research conclusions are :1) an extremely long pseudo stable state emerges because of the faulty neurons in the SOM.However, the global ordering state is achieved eventually after the pseudo stable state. A technique to shorten the pseudo stable state period has been proposed and its effectiveness has been analyzed quantitatively.2) the critical-stuck-output rho_c of the defective neuron has been derived from the defect SOM model. If the defective neuron's output rho_d is much smaller than rho_c, the global-ordering state can hardly be achieved. However, the probability that this undesired case happens is about 6% of all stuck-outputs in the present neuro-computer.3) Experiments on the defective SOM have been carried out, and the results have been well agreed with the above theoretical predictions, indicating that the theoretical evaluation is correct. The obtained results and criteria will be utilized for the future neuro-computers and fault-tolerant neuro-computers designs.
随着未来计算机硬件规模的扩大,对硬件故障的高鲁棒性的需求将大大增加。这项研究的目的是提出一种对运行时和制造过程中发生的故障具有高鲁棒性的计算机。在本研究中,选择神经计算机作为目标计算机。神经计算机具有高容错能力,因为它模仿生物神经系统。然而,关于其容错性的结果还没有被报道。特别是,SOM(自组织映射)作为一种有前途的神经计算机架构的容错性尚未得到探索。SOM 的自主修复能力已经使用真实的神经计算机从理论上和实验上进行了评估。研究结论是:1)由于SOM中神经元的故障,出现了极长的伪稳定状态。然而,在伪稳定状态之后最终实现了全局有序状态。提出了一种缩短伪稳态周期的技术,并对其有效性进行了定量分析。2)从缺陷SOM模型推导了缺陷神经元的临界卡住输出rho_c。如果有缺陷的神经元的输出 rho_d 远小于 rho_c,则很难实现全局排序状态。然而,这种不希望发生的情况发生的概率约为当前神经计算机中所有卡住输出的6%。3)对有缺陷的SOM进行了实验,结果与上述理论预测非常吻合,表明理论评估是正确的。获得的结果和标准将用于未来的神经计算机和容错神经计算机设计。

项目成果

期刊论文数量(12)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
Moritoshi Yasunaga, et al.: "SOM (Self-Organizing Map) Implemented by Wafer Scale Integration Its Self-Organizing Behavior under Defects" Proc.Int.Conf.Innovative Systems in Silicon. 323-329 (1996)
Moritoshi Yasunaga 等人:“通过晶圆级集成实现的 SOM(自组织映射)及其在缺陷下的自组织行为”Proc.Int.Conf.Innovative Systems in Silicon。
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    0
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Moritoshi Yasunaga, et al.: "Autonomous Repairing in Neuro-Computers" IEICE Technical Report of Function Integration Information Systems, FIIS97. 1-12 (1997)
Moritoshi Yasunaga 等人:“神经计算机的自主修复”IEICE 功能集成信息系统技术报告,FIIS97。
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    0
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Moritoshi Yasunaga,et al.: "Self-Repairing in Neuro-Computers under Defective Neuron Circuits" Proc.Int.Workshop on Brainware. 150-152 (1996)
Moritoshi Yasunaga 等人:“神经元电路缺陷下神经计算机的自我修复”Proc.Int.Workshop on Brainware。
  • DOI:
  • 发表时间:
  • 期刊:
  • 影响因子:
    0
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Moritoshi Yasunaga, et al.: "Self-Repairing in Neuro-Computers under Defective Neuron Circuits" Proc.Int.Workshop on Brainware. 150-152 (1996)
Moritoshi Yasunaga 等人:“神经元电路缺陷下神经计算机的自我修复”Proc.Int.Workshop on Brainware。
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  • 发表时间:
  • 期刊:
  • 影响因子:
    0
  • 作者:
  • 通讯作者:
Moritoshi Yasunaga, et al.: "Fault-tolerance evaluation of SOM (Self-Organizing Map) using a neuro-computer : MY-NEUPOWER" Proc.Int.Conf.Neural Information Processing. Vol.2. 1395-1399 (1996)
Moritoshi Yasunaga 等人:“使用神经计算机对 SOM(自组织映射)进行容错评估:MY-NEUPOWER”Proc.Int.Conf.Neural Information Processing。
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    0
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YASUNAGA Moritoshi其他文献

YASUNAGA Moritoshi的其他文献

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{{ truncateString('YASUNAGA Moritoshi', 18)}}的其他基金

Development of a Low Loss Transmission Line Using Resonance Interconnection
利用谐振互连开发低损耗传输线
  • 批准号:
    26289114
  • 财政年份:
    2014
  • 资助金额:
    $ 2.69万
  • 项目类别:
    Grant-in-Aid for Scientific Research (B)
Application of the Genetic Algorithms for ElectromagneticNoise Reduction Traces
遗传算法在电磁降噪迹线中的应用
  • 批准号:
    23650116
  • 财政年份:
    2011
  • 资助金额:
    $ 2.69万
  • 项目类别:
    Grant-in-Aid for Challenging Exploratory Research
Transmission Line Technology for Digital LSIs at 30GHz and Its Feasibility Study on Prototyping
30GHz数字LSI传输线技术及其原型可行性研究
  • 批准号:
    21360178
  • 财政年份:
    2009
  • 资助金额:
    $ 2.69万
  • 项目类别:
    Grant-in-Aid for Scientific Research (B)
Development of a high-speed image-understanding system designed directly from image data
开发直接根据图像数据设计的高速图像理解系统
  • 批准号:
    13450163
  • 财政年份:
    2001
  • 资助金额:
    $ 2.69万
  • 项目类别:
    Grant-in-Aid for Scientific Research (B)
Neural LSI's Possessing Autonomous Defect Self-repairing Capability
神经LSI具备自主缺陷自我修复能力
  • 批准号:
    10450131
  • 财政年份:
    1998
  • 资助金额:
    $ 2.69万
  • 项目类别:
    Grant-in-Aid for Scientific Research (B).

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