Estimation of overgrown somiconductor interfaces with buried fine metal patterns by using resonant properties of electron wave

近年来，基于纳米技术的超高速和/或超大规模集成器件的发展迅速进行。因此，需要实现涉及多种接口的所谓接口丰富设备。在这类器件中，由于原子级厚度的粗糙度、缺陷、位于界面周围的杂质导致的界面不均匀性对器件性能有很大的影响，在本研究中，我们使用隧道二极管来研究界面特性与器件性能之间的关系，其中半导体异质界面在显示负微分电阻方面起着重要作用。我们制作了基于GaInP/GaAs异质结的三势垒共振隧穿二极管，测量了几种结构的器件的直流和射频特性，以阐明影响器件特性的物理因素，并研究了利用Kelvin探针力显微镜观察异质界面附近电势分布的判据。

Recently development of ultra-high speed and/or ultra large scale integration devices proceed rapidly on the basis of nano-technology. As a results, so-called interface rich device where many kinds of interfaces are involved, are required to be realized. In such devices, the device performance is drastically affected by inter face inhomogeneities due to roughness in atomic order thickness, defects, impurities located around interfaces.In this research we focus on investigation of a relation between interface properties and device performances by using tunnel diodes in which semiconductor heterointerfaces play a important role of revealing negative differential resistance. We fabricated trple-barrier resonant tunneling diodes based on GaInP/GaAs heterostructure and the DC and RF characteristics were measured for several types of device structures in order to clarify physical factors affecting on the characteristics.Moreover, we investigated a criterion of observing potential distribution around heterointerfaces by using Kelvin probe force microscopy.