Research on Chemo-Mechanical Grinding Process for Extremely-thin Si Wafer Used in Next Generation Power Devices

经过长期的研究和开发，新的能源来源，如燃料电池、太阳能发电和风力发电将进入实际使用的阶段。最基本的驱动力和赋能技术是电力电子学。在电力设备性能、功能、可靠性和微小化方面的改进得到了立即的要求。特别是，一种现场停型IGBT （绝缘栅双极晶体管）是预期能造成一个技术突破。不像传统晶体管的结构， IGBT函数是当前流动的跨Si基底的厚度方向。由于IGBT的切换抵抗力是硅基底的厚度，而当前的冲击--通过类型IGBT的厚度为350微米，并且具有较大的能量损失。这个问题是由电压下降和内部热量产生引起的。下一代非冲击型IGBT的设计对汽车工业来说是100微米厚的。 ... More 因此，硅晶圆片将被降低到降低的厚度上。在附加、系统LSI （大规模集成）电路的微小化和高程度集成是由移动设备直接要求的。作为一个成本有效的解决方案，包含低配置文件包的多层芯片被应用到IC卡、移动电话和数字音乐播放器等产品中。硅晶圆片必须从50 - 70微米到725微米到8英寸晶圆片，或从800微米到12英寸晶圆片，在被切碎进入个人芯片之前。在下一阶段，当新的转换互连技术可用时，要求芯片厚度将进一步降低到30 - 50微米，背面研磨是降低芯片到最终包装的最小厚度的常规方法。钻石轮和过程参数必须在研磨过程中进行最佳化，以便在最小的下表面损坏。由于在超精密工程和ductile模式机器的概念中使用最新的技术，现在可以控制每个粗糙度的切割深度，而没有达到关键的限制，导致材料碎片在研磨后没有留下任何裂缝。However，包括塑料流和永久压力的底层损伤是在表面上开发的。由于芯片的缺陷强度的这种类型，它在150微米以下的薄芯片上有很大的不同。在清除这种缺陷的情况下，一个更小的处理单元，在交互力/能量中，由于硅塑料变形，这是最好的。抛光是一种可行的技术，可以使表面几乎不受塑料流动的影响，但这种清洁具有几何准确性。作为一种替代解决方案，一个固定的粗糙过程提供了更好的几何精度，需要较少的设备/过程步骤和无电荷废物处置。However， the damaged layer of several μm to several ten μm thick is the barrier to the use fixed abrasive technology， as it is intolerable for Si substrates as typical ICs are built in the layer of 2 ~ 10 μm thick from the topmost surface。为了实现一个仅由固定的粗糙的表面，这项研究成功地开发了一个新颖的化学机械-研磨（CMG）过程，并通过介绍化学效应进入研磨过程。该项目的结果在该项目的周期内达到了最高的水平;·一个新的研磨轮子，它具有固态化学反应与硅已经成功地开发出来。在CMG轮子上，它可以在干燥条件下在Φ300毫米硅晶圆上产生一个无缺陷的表面。CMG的表面完整性要么是等同的，要么比商业CMP晶圆片更好。一台机器上的仪器已经成功地开发了，以衡量地面叶片的几何形状。有了上面的仪器，就有可能获得包括SFQR、GBIR、TTV和其他几何尺寸参数在内的三个维度参数，以控制和评估磨削操作。一个分子动力学模拟已经被证明是为了验证CMG机制。该模拟结果揭示了CMG的化学方面是基于硅和O_2之间的热化学反应和CeO_2之间的固体反应，是以一种非典型复合体中的软产品为基础的，并且可以通过相对的软产品机械地去除的。CMG晶圆片的最终厚度为8英寸晶圆片30微米，12英寸晶圆片100微米，TTV的最终厚度为0.2%。CMG的机器时间包括8英寸晶圆片10分钟和12英寸晶圆片30分钟。Less（低）

After long term research and development, new energy sources like fuel cell, solar-electric power generation and wind force power generation are getting into the stage of practical use. The most essential driving force and enabling technology is the power electronics. Improvement in performance, function, reliability and miniaturization of power devices is increasingly demanded. Especially, the Field-Stop type IGBT (Insulated Gate Bipolar Transistor) is expected to make a technological break-through. Unlike the structure of conventional transistors, IGBT functions as the current flows across the thickness directions of the Si substrate. Since the switching resistance of IGBT is proportional to the thickness of the Si substrate, the current Punch-Through type IGBT is 350 μm thick and thus has a large energy loss. The problems encountered are the voltage drop and internal heat generation. The design for next-generation non-punch through type IGBT is 100 μm thick for automotive industry. … More Therefore, the Si wafer has to be thinned down to the diminished thickness.In addition, the miniaturization and high degree integration of system LSI (large scale integrated) circuit are increasingly demanded by mobile devices. As a cost effective solution, low-profile-package containing multi-layer chips is applied into the products like IC cards, mobile phones and digital music players. The Si wafers have to be thinned down to 50〜70 μm from 725μm for 8 inch wafer or from 800μm for 12 inch wafer, before being diced into individual chips. At the next stage when the new transfixed interconnection technology is available, the wafer thickness required is further down to 30〜50 μm.Backgrinding is the conventional method for reducing wafer to a diminished thickness suitable for the final packaging. The diamond wheels and process parameters are necessarily optimized to obtain minimal subsurface damage in grinding process. By use of the latest technologies in ultra precision engineering and the concept of ductile mode-machining, it is now able to control the cutting depth of each abrasive not to exceed the critical limit which causes the material fracture so that no crack remains on the surface after grinding. However, subsurface damage including plastic flow and residual stress are developed on the surface instead. As such kinds of defect degrade the wafer deflective strength, it is very difficult to thin wafer down below 150μm.In order to remove such defects, a further smaller processing unit, in which the interactive force/energy is small enough not to cause silicon plastic deformation, is preferable. Polishing is an available technology possible to produce a surface almost free of plastic flow, but this sacrifices the geometric accuracy. As an alternative solution, a fixed abrasive process offers better accuracy in geometry, requires fewer steps of the equipment/process and discharges less waste disposal. However, the damaged layer of several μm to several ten μm thick is the barrier to the use fixed abrasive technology, as it is intolerable for Si substrates as typical ICs are built in the layer of 2〜10 μm thick from the topmost surface. To achieve a defect-free surface by fixed abrasive only, this research has successfully developed a novel chemo-mechanical-grinding (CMG) process, by introducing chemical effect into the grinding process. The results achieved during the period of this project are summarized as follows;・A new grinding wheel which possesses solid-state chemical reaction with Si has been successfully developed.・With above CMG wheel, it is able generate a defect free surface on the Φ300 mm Si wafer at a dry condition.・The surface integrity of CMG is equivalent or better than that of commercial CMP wafer.・A on-machine instrument has been successfully developed to measure the geometry of ground wafers.・With the above instrument, it is able to get the 3 dimensional parameters including SFQR, GBIR, TTV and other geometric dimension necessary for control and evaluation of grinding operation.・A molecular dynamic simulation has been performed to verify the CMG mechanism.・The simulation results has revealed that the chemical aspect of CMG is based on the thermal-chemical reaction between Si and O_2, and the solid-state reaction between the CeO_2 abrasive and products of SiO_2, which forms a soft product in an amorphous complex and can be mechanically removed by relatively soft abrasives.・The final thickness of CMG wafer is 30 μm for 8 inch wafers and 100 μm for 12 inch wafers, and the TTV is within 0.2% of the final thickness.・The machining time including CMG is about 10 minutes for 8 inch wafers and 30 minutes for 12 inch wafers. Less