Memristive hybrid on-chip memory for a low-power RISC-V processor - Design and Implementation (HYB-RISC)

用于低功耗 RISC-V 处理器的忆阻混合片上存储器 - 设计和实现 (HYB-RISC)

• 批准号: 536099247
• 负责人: Professor Dr.-Ing. Dietmar Fey
• 金额: --
• 依托单位: Chair of Computer Science 3 (Hardware Architectures)
• 依托单位国家: 德国
• 项目类别: Priority Programmes
• 资助国家: 德国
• 项目状态: 未结题
• 来源: https://gepris.dfg.de/gepris/projekt/536099247?language=en
• 关键词: Memristive; hybrid; chip; memory; low

The aim of the project is to demonstrate that the use of memristive ReRAM memories in close combination with flip-flops and SRAM memory in so-called hybrid non-volatile registers and memories can noticeably reduce energy consumption and power consumption in future processors. This also requires adaptation of existing design tools so that complicated designs such as a processor can use memristive memories, precisely RRAMs, for automatic synthesis. This has not been the case to date. The proof is to be provided by means of a simulation system to be developed, which will use online learning in neural networks to show that energy and power consumption are noticeably reduced by more energy-efficient reading in RRAMs and energy-efficient writing in RRAMs. The proof that the necessary extension of the design programs carried out in the project works correctly is to be provided by the production and measurement of synthesized chips.

该项目的目的是证明，在所谓的混合非易失性寄存器和存储器中使用忆阻ReRAM存储器与触发器和SRAM存储器紧密结合，可以显着降低未来处理器的能耗和功耗。这也需要调整现有的设计工具，以便复杂的设计，如处理器可以使用忆阻存储器，准确地说是RRAM，用于自动合成。迄今为止，情况并非如此。证据将通过待开发的模拟系统来提供，该模拟系统将使用神经网络中的在线学习来表明，通过RRAM中的更节能的阅读和RRAM中的节能的写入，能量和功率消耗显著降低。通过生产和测量合成芯片，证明在项目中正确执行的设计程序的必要扩展。