Reconfigurable logic and Multi-bit in-memory processing with ferroelectric memristors -ReLoFeMris

使用铁电忆阻器的可重构逻辑和多位内存处理 -ReLoFeMris

• 批准号: 441909639
• 负责人: Professor Dr.-Ing. Dietmar Fey
• 金额: --
• 依托单位: Institut für Halbleiter- und Mikrosystemtechnik (IHM)
• 依托单位国家: 德国
• 项目类别: Priority Programmes
• 资助国家: 德国
• 项目状态: 未结题
• 来源: https://gepris.dfg.de/gepris/projekt/441909639?language=en
• 关键词: Reconfigurable; logic; Multi; bit; memory

Given the increasing demand for electronic devices in edge-computing applications and IoT, the energy consumption by data transmission from edge to cloud devices as well as the power consumption within the cloud will further increase, unless edge devices would become efficient enough to directly compute e.g. sensor date directly in places. Therefore, in order to realize an overall reduction of power consumption of the IT sector, and thus to facilitate the reduction of the world wide CO2 emission, it becomes increasingly important to develop electronic technologies that enable very efficient computing in mobile and edge devices. Therefore, novel computing paradigms that adopt non-volatile memory devices are of great interest. Especially for embedded devices it makes sense to execute simple logic operations where the data or the operands are located or are generated, namely in the memory or directly at sensor nodes. Near- and in-memory-computing is in principle an answer to the high energy costs of data transfer operations. The aspired project ReProFeMris pursuits the provision and practical implementation of future memristive ferroelectric technology and its application in future energy-efficient embedded in-memory processing architectures. The memristive ferroelectric technology that is to be exploited in the envisaged project is the ferroelectric tunneling junction (FTJ) that is one of the most power efficient technologies compared e.g. to classical ReRAM, STT-MRAM or PCM, that are under investigation at the present. Our project targets to exploit the unique features of ferroelectric memristive technology like MLC capability and reconfigurable logic for in memory arithmetic processing circuits. More specifically, we aim at the utilization of the ferroelectric tunneling junctions for the realization of non-volatile logic gates. Under consideration of the huge promises for extreme low-power operation that these devices possess, however, we target at leveraging the functionality of such concepts by overcoming the given limitations in limited MLC capability and low-current capability of these devices by means of circuit design. At the end of the first project period various basic arithmetic building blocks for extreme area-saving and energy-efficient reconfigurable memristive in-memory computing circuits as well as MLC feature exploiting circuits shall be realized in hardware and the results shall be published as a technical report which is public available via the web pages of NaMLab and FAU.

鉴于在边缘计算应用程序和物联网中对电子设备的需求不断增长，除非边缘设备在云设备到云设备的数据传输以及云中的功耗将进一步增加，除非Edge设备将变得足够有效地直接计算，否则传感器直接在某个地方约会。因此，为了实现IT领域的能力消耗的总体降低，从而促进了全球二氧化碳排放的减少，开发电子技术可以在移动和边缘设备中非常有效计算的电子技术变得越来越重要。因此，采用非易失性记忆设备的新型计算范例引起了极大的兴趣。特别是对于嵌入式设备，执行数据或操作数所在或生成的简单逻辑操作是有意义的，即在内存中或直接在传感器节点处。近乎内存的计算原则是对数据传输操作高能成本的答案。 Aspired Project Reprofemris追求未来的回忆铁电技术的提供和实际实施，及其在未来的节能嵌入式内存中处理体系结构中的应用。在设想的项目中要利用的回忆铁电技术是铁电隧道交界处（FTJ），它是比较的最有效的技术之一。目前正在研究的经典重新兰氏，STT-MRAM或PCM。 我们的项目目标是利用铁电回忆技术（例如MLC功能和可重新配置逻辑）的独特功能，以在内存算术处理电路中进行。更具体地说，我们旨在利用铁电隧道连接处，以实现非挥发性逻辑门。但是，在考虑这些设备所拥有的极端低功率操作的巨大承诺下，我们通过克服有限的MLC功能和这些设备低电流功能的给定限制来利用此类概念的功能，并通过电路设计来利用这些概念的限制。在第一个项目阶段结束时，各种基本的算术构建块，用于极端的区域和节能的可重新配置可靠的记忆内计算电路以及MLC功能可利用电路的功能，并应在硬件中实现，并且结果应以技术报告发布，该报告可通过namlab and fau的Namlab和fau公开提供技术报告。