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A Study on Processor Architectures that are tolerable to Soft-error, Process variation, and Aging.

A Study on Processor Architectures that are tolerable to Soft-error, Process variation, and Aging.
关于可容忍软错误、过程变化和老化的处理器架构的研究。
批准号:
20300019
负责人:
SATO Toshinori
金额:
$10.07万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for Scientific Research (B)
财政年份:
2008
资助国家:
日本
项目状态:
已结题
起止时间:
2008 至 2010

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中文摘要
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英文摘要
Semiconductor LSI technologies has been improved for decades. Smart phones are the representative, which benefit from the improvement. However, unfortunately, serious problems areemerging. Since transistors are much shrunken, their reliability is severely degraded. Hence, IT devices utilizing such transistors also become unreliable. This study attacks the problems. For some cases, the degradation in transistors is reduced by 70%.
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会议论文
Uncriticality-directed Scheduling for Tackling Variation and Power Challenges
用于应对变化和功率挑战的非关键性调度
DOI: --
发表时间: 2009
期刊:
影响因子: --
作者: [Toshinori Sato, Shingo Watanabe]
通讯作者: Shingo Watanabe
DOI: --
发表时间:
期刊:
影响因子: --
作者: []
通讯作者:
Enhancements of a Circuit-Level Timing Speculation Technique and Their Evaluations Using a Co-simulation Environment
电路级时序推测技术的增强及其使用联合仿真环境的评估
DOI: --
发表时间: 2009
期刊: IEICE Transactions on Electronics E92-C
影响因子: --
作者: [Yuji Kunitake, Kazuhiro Mima, Toshinori Sato, Hiroto Yasuura]
通讯作者: Hiroto Yasuura
A Selective Replacement Method for Timing-Error-Predicting Flip-Flops
时序误差预测触发器的选择性替换方法
DOI: --
发表时间: 2011
期刊:
影响因子: --
作者: [Yuji Kunitake, Toshinori Sato, Hiroto Yasuura, Takanori Hayashida]
通讯作者: Takanori Hayashida
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