Low-Power FPGA Based on Fine-grained Autonomous Supply-Voltage Control

现场可编程门阵列由于其功能和互连网络可以通过制造后编程来重新配置而备受关注。然而，它们的主要问题是占地面积大，功耗大，因为它们的冗余度高。在本研究中，我们提出了一种新颖的架构，它可以控制每个查找表的电源电压和阈值电压，从而在处理时间的约束下将功耗降到最低。此外，我们开发的体系结构可以在LUT不工作时关断电源。

FPGAs attract much attention since their functions and interconnection network can be reconfigured by post-fabrication programming. However, their major problem is its large area and power consumption because of their high redundancy. In this research, we develop novel architecture that can control the supply voltage and threshold voltage of each look-up table so as to minimize the power consumption under the constraint of the processing time. Moreover, we develop architecture that can gate the power when LUTs do not work.