A Study of Acceleration Technique for Many-core Architecture Simulation Considering Global Program Structure

本文提出了一种快速、高精度的多核和众核处理器体系结构仿真技术。通过该技术，架构模拟器在多核或众核上执行并行化应用的假设下，适当地改变了其精度和模拟速度，对4个不同特性的应用的评估结果表明，16核多核模拟器在最大误差为0.52%的情况下，获得了443倍的加速比，在平均误差2.75%的范围内，实现了218次加速。

A fast and high accuracy architecture simulation technique for multi-core and many-core processors are proposed in this study. By this proposed technique, an architecture simulator changes its precision and simulation speed appropriately under the assumption that a parallelized application is executed on a multi-core or a many-core.The evaluation results with four applications each of which has different characteristics show the 16-core multicore simulation gives 443 times speedup within 0.52% error in maximum, and 218 times speedup within 2.75% error on average.